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參數(shù)資料
| 型號(hào)： | LC72134M |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 160 MHz, PDSO24 |
| 封裝： | MFP-24 |
| 文件頁數(shù)： | 23/27頁 |
| 文件大小： | 463K |
| 代理商： | LC72134M |
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No. 5814-5/27
LC72134M
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
VOL1
PDa, PDb: IO = 1 mA
1.0
V
VOL2
BO1: IO = 0.5 mA
0.5
V
BO1: IO = 1 mA
1.0
V
VOL3
DO: IO = 1 mA
0.2
V
Output low-level voltage
DO: IO = 5 mA
1.0
V
BO2 to BO4, IO2: IO = 1 mA
0.2
V
VOL4
BO2 to BO4, IO2: IO = 5 mA
1.0
V
BO2 to BO4, IO2: IO = 8 mA
1.6
V
VOL5
AOUTa, AOUTb: IO = 1 mA, AIN = 1.3 V
0.5
V
IIH1
CE, DI, CL: VI = 6.5 V
5.0
A
IIH2
IFIN2/I1: VI = VDD, L/I1 = 0
5.0
A
IIH3
IO2: VI = 13 V
5.0
A
Input high-level current
IIH4
XIN: VI = VDD
2.0
11
A
IIH5
FMINa, FMINb, AMIN: VI = VDD
4.0
22
A
IIH6
IFIN1, IFIN2/I1: VI = VDD
8.0
44
A
IIH7
AINa, AINb: VI = 6.5 V
200
nA
IIL1
CE, DI, CL: VI = 0 V
5.0
A
IIL2
IFIN2/I1: VI = 0 V, L/I1 = 0
5.0
A
IIL3
IO2: VI = 0 V
5.0
A
Input low-level current
IIL4
XIN: VI = 0 V
2.0
11
A
IIL5
FMINa, FMINb, AMIN: VI = 0 V
4.0
22
A
IIL6
IFIN1, IFIN2/I1: VI = 0 V
8.0
44
A
IIL7
AINa, AINb: VI = 0 V
200
nA
Output off leakage current
IOFF1
BO1 to BO4, AOUTa, AOUTb, IO2: VO = 13 V
5.0
A
IOFF2
DO: VO = 6.5 V
5.0
A
High-level 3-state off leakage current
IOFFH
PDa, PDb: VO = VDD
0.01
200
nA
Low-level 3-state off leakage current
IOFFL
PDa, PDb: VO = 0 V
0.01
200
nA
Input capacitance
CIN
FMINa, FMINb
6
pF
IDD1
VDD: Crystal = 7.2 MHz, fIN2 = 130 MHz
5
10
mA
(FMINa operating), VIN2 = 40 mV rms
VDD: Crystal = 7.2 MHz, fIN2 = 130 MHz
IDD2
(FMINa and FMINb operating),
8
16
mA
Current drain
VIN2 = 40 mV rms
VDD: PLL block stopped (PLL INHIBIT mode)
IDD3
Crystal oscillator operating
0.5
mA
(crystal frequency: 7.2 MHz)
IDD4
VDD: PLL block stopped, crystal oscillator
10
A
stopped
Continued from preceding page.
Pin Descriptions
Pin
Pin No.
Type
Function
Equivalent circuit
Xtal
Crystal oscillator element connections (4.5 or 7.2 MHz)
XIN
XOUT
1
24
Main PLL
local oscillator
signal input
FMINa is selected when DVS in the serial data is set to 1.
Input frequency: 10 to 160 MHz
The signal is passed through an internal divide-by-two prescaler and then input to
the swallow counter.
The divisor can be set to a value in the range 272 to 65535. Since the internal
divide-by-two prescaler is used, the actual divisor will be twice the set value.
FMINa
18
Continued on next page.
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PDF描述 |
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| LC72140M | PLL FREQUENCY SYNTHESIZER, 160 MHz, PDSO24 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC72135M | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer for Electronic Tuning |
| LC72135MA-AE | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| LC72135MA-Q-AE | 制造商:ON Semiconductor 功能描述:PLL FREQUENCY SYNTHESIZER - Tape and Reel 制造商:ON Semiconductor 功能描述:REEL / PLL FREQUENCY SYNTHESIZER |
| LC72135M-Q-TLM-E | 制造商:SANYO Semiconductor Co Ltd 功能描述: |
| LC72136 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer for Electronic Tuning |
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