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參數(shù)資料
| 型號： | LC66354C |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Quadruple 2-Input Positive-AND Gates 14-TSSOP -40 to 85 |
| 中文描述： | 四位單片機與4,6微控制器和8 KB的片上ROM |
| 文件頁數(shù)： | 11/21頁 |
| 文件大?。?/td> | 140K |
| 代理商： | LC66354C |
Continued from preceding page.
Note: 1. With the output Nch transistor off in shared I/O ports with the open-drain output specifications. These pins cannot be used as input pins if the
CMOS output specifications are selected.
2. With the output Nch transistor off in shared I/O ports with the open-drain output specifications. The rating for the pull-up output specification pins is
stipulated in terms of the output pull-up current IPO. These pins cannot be used as input pins if the CMOS output specifications are selected.
3. With the output Nch transistor off for CMOS output specification pins.
4. With the output Nch transistor off for pull-up output specification pins.
5. With the output Nch transistor off for open-drain output specification pins.
6. Reset state
Figure 1 External Clock Input Waveform
Figure 2 Ceramic Oscillator Circuit
Figure 3 Oscillator Stabilization Period
Table 1 Guaranteed Ceramic Oscillator Constants
No. 5484-11/21
LC66354C, 66356C, 66358C
Parameter
Symbol
Conditions
min
typ
max
Unit
Note
[Pulse conditions]
INT0: Figure 6, conditions under which the INT0
interrupt can be accepted, conditions under
which the timer 0 event counter or pulse width
measurement input can be accepted
INT0 high and low-level
t
IOH
, t
IOL
2
Tcyc
High and low-level pulse widths
for interrupt inputs other than INT0
t
IIH
, t
IIL
INT1, INT2: Figure 6, conditions under which
the corresponding interrupt can be accepted
2
Tcyc
PIN1 high and low-level
pulse widths
t
PINH
, t
PINL
PIN1: Figure 6, conditions under which the
timer 1 event counter input can be accepted
2
Tcyc
RES high and low-level
pulse widths
t
RSH
, t
RSL
RES: Figure 6, conditions under which reset
can be applied.
3
Tcyc
Comparator response speed
T
RS
PD: Figure 7, V
DD
= 3.0 to 5.5 V
V
DD
: 4-MHz ceramic oscillator
V
DD
: 4-MHz external clock
V
DD
: 4-MHz ceramic oscillator
V
DD
: 4-MHz external clock
V
DD
: V
DD
= 1.8 to 5.5 V
20
ms
Operating current drain
I
DD OP
3.0
5.0
mA
6
3.0
5.0
mA
Halt mode current drain
I
DDHALT
1.0
2.0
mA
1.0
2.0
mA
Hold mode current drain
I
DDHOLD
0.01
10
μA
4 MHz
(Murata Mfg. Co., Ltd.)
CSA4.00MG
C1 = 33 pF ± 10%
4 MHz
(Kyocera Corporation)
KBR4.0MS
C1 = 33 pF ± 10%
C2 = 33 pF ± 10%
C2 = 33 pF ± 10%
Rd = 0 ‰
Rd = 0 ‰
textL
OPEN
(OSC2)
OSC1
textR
1/fext
textF
VSS
VDD
0.2VDD
0.8VDD
textH
External clock
OSC2
OSC1
C1
C2
Rd
Ceramic
oscillator
VDD
OSC
0V
Oscillator
unstable period
t
CFS
Stable oscillation
Operating V
minimum value
DD
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LC66354S | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Four-Bit Single-Chip Microcontroller with 16 KB of On-Chip EPROM |
| LC66354V | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:4-bit Microcontroller with Built-in PROM |
| LC66356A | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Four-Bit Single-Chip Microcontroller with 16 KB of On-Chip OTP PROM |
| LC66356B | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Four-Bit Single-Chip Microcontroller with 16 KB of On-Chip OTP PROM |
| LC66356C | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Four-Bit Single-Chip Microcontroller with 16 KB of On-Chip OTP PROM |
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