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No. 5997-12/17
LC662508A, 662512A, 662516A
Continued from preceding page.
ROM area
Bit
Option specified
Option/data relationship
7
6
5
3FFEH
4
Reserved. Must be set to predefined data values.
This data is generated by the assembler.
If the assembler is not used, set this data to 00.
3
2
1
0
7
6
5
3FFFH
4
Reserved. Must be set to predefined data values.
This data is generated by the assembler.
If the assembler is not used, set this data to 00.
3
2
1
0
Note: 1. Applies to pins with open-drain output specifications. For pins with other than open-drain output specifications, the ratings in the pin column for that
pin apply.
2. For the oscillator input and output pins, levels up to the free-running oscillation level are allowed.
3. Sink current (Applies to P8 when the CMOS output specifications and applies to PD when the inverter array specifications are selected.)
4. Source current (Applies to all pins except P8 for which the pull-up output specifications, the CMOS output specifications, or the inverter array
specifications have been selected. Applies to PD pins for which the inverter array specifications have been selected.)
Contact your Sanyo representative for details on the electrical characteristics when the inverter array specifications option is selected.
5. We recommend the use of reflow soldering techniques to solder mount QFP packages.
Please consult with your Sanyo representative for details on process conditions if the package itself is to be directly immersed in a dip-soldering
bath (dip-soldering techniques).
Parameter
Symbol
Conditions
Ratings
Unit
Note
Maximum supply voltage
V
DD
max
V
DD
P2, P3 (except for the P33/HOLD pin),
P61, and P63
–0.3 to +7.0
V
V
IN
1
–0.3 to +15.0
V
1
Input voltage
V
IN
2
All other inputs
–0.3 to V
DD
+ 0.3
V
2
V
OUT
1
P2, P3 (except for the P33/HOLD pin),
P61, P63, and PA
–0.3 to +15.0
V
1
Output voltage
V
OUT
2
All other inputs
–0.3 to V
DD
+ 0.3
V
2
I
ON
1
P0, P1, P2, P3 (except for the P33/HOLD pin),
P4, P5, P6, P7, P8, P9, PA, PB, PC, PD1, PD3
20
mA
3
I
ON
2
–I
OP
1
P41, P43, PC3, PD1, PD3
20
mA
3
Output current per pin
P0, P1, P4, P5, P7, PA, PB
2
mA
4
–I
OP
2
P2, P3 (except for the P33/HOLD pin), P6, P8, P9,
and PC
4
mA
4
–I
OP
3
P41, P43, PC3, PD1, PD3
10
mA
4
Σ
I
ON
1
P0, P1, P2, P3 (except for the P33/HOLD pin), PB,
PC, and PD
75
mA
3
Total pin current
Σ
I
ON
2
P4, P5, P6, P7, P8, P9, and PA
75
mA
3
Σ
I
OP
1
P0, P1, P2, P3 (except for the P33/HOLD pin), PB,
PC, and PD
25
mA
4
Σ
I
OP
2
Pd max
P4, P5, P6, P7, P8, P9, and PA
25
mA
4
Allowable power dissipation
Ta = –30 to +70°C: DIP64S (QFP64E)
600 (430)
mW
5
Operating temperature
Topr
–30 to +70
°C
Storage temperature
Tstg
–55 to +125
°C
Specifications
Absolute Maximum Ratings
at Ta = 25°C, V
SS
= 0 V