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參數(shù)資料
| 型號： | LC65F1306A |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | 4-Bit Single-Chip CMOS Microcontroller for Small-Scale Control Applications |
| 中文描述： | 4位單芯片CMOS微控制器進行小規(guī)?？刂浦械膽?/td> |
| 文件頁數(shù)： | 14/22頁 |
| 文件大?。?/td> | 685K |
| 代理商： | LC65F1306A |
LC65F1306A
No.6829-14/22
Ratings
typ.
Parameter
Symbol
Conditions
Pin
min.
392
784
980
3920
max.
408
816
1020
4080
unit
Oscillation
characteristics
Ceramic resonator
Frequency
fCFOSC
(Note 7)
Fig. 3 fo=400kHz
Fig. 3 fo=800kHz
Fig. 3 fo=1MHz
Fig. 3 fo=4MHz, with no divider,
divide-by-three, or divide-by-four
circuit
Fig. 4 fo=400kHz
Fig. 4 fo=800kHz, 1MHz, or
4MHz, with no divider,
divide-by-three, or divide-by-four
circuit
Fig. 2 Cext=270pF±5%
Fig. 2 Rext=5.6k
±
1%
VIN=VSS
VDD=5V
OSC1,OSC2
OSC1,OSC2
OSC1,OSC2
OSC1,OSC2
400
800
1000
4000
kHz
Oscillation
stabilizing time
(Note 8)
tCFS
10
10
ms
Two-pin RC
oscillator frequency
Pull-up resistance
RES
External reset
characteristics
Reset time
Pin capacitance
fMOSC
OSC1, OSC2
587
800
1298
kHz
Ru
RES
200
500
800
k
tRST
Cp
See Fig.5
10
f=1MHz,
Pins except for tested pins,
VIN=VSS
Fig. 6
pF
Serial clock
Input clock Cycle
time
Output clock Cycle
time
Input clock low
level pulse width
Output clock low
level pulse width
Input clock high
level pulse width
Output clock high
level pulse width
Serial input
Data setup time
Data hold time
tCKCY(1)
tCKCY(2)
tCKL(1)
tCKL(2)
tCKH(1)
tCKH(2)
tICK
tCKI
SCK
2.0
μ
s
Fig. 6
SCK
64
×
tCYC
(Note 9)
Fig. 6
SCK
0.6
Fig. 6
SCK
32
×
tCYC
Fig. 6
SCK
0.6
Fig. 6
SCK
32
×
tCYC
SI
SI
0.2
0.2
Specified for the rising edge of
SCK
Fig. 6
Specified for the falling edge of
SCK
Select only Nch OD option, and
add external 1k
resistor and
external 50pF capacitor.
Fig. 6
Serial output
Output delay time
tCKO
SO
0.4
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