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參數(shù)資料
| 型號(hào)： | LC651431F |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Four-Bit CMOS Microcontrollers for Small-Scale Control Applications |
| 中文描述： | 4位CMOS微控制器的小規(guī)模控制中的應(yīng)用 |
| 文件頁數(shù)： | 31/39頁 |
| 文件大?。?/td> | 374K |
| 代理商： | LC651431F |
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No. 6498-31/39
LC651432N/F/L, 651431N/F/L
Continued from preceding page.
Parameter
Symbol
Conditions
Applicable pins
Ratings
Unit
min
typ
max
Oscillator characteristics
Ceramic oscillator
Oscillator frequency
f
CFOSC
*
7
Figure 3, fo = 400 kHz
Figure 3, fo = 4 MHz,
divide-by-four circuit
used.
OSC1, OSC2
OSC1, OSC2
392
3920
400
4000
408
4080
kHz
kHz
Oscillator stabilization time
*
8
Figure 4, fo = 400 kHz
Figure 4, fo = 800 kHz,
1 MHz, or 4 MHz, divide-
by-four circuit used.
10
10
ms
ms
t
CFS
Two-pin RC oscillator
Oscillator frequency
f
MOSC
Figure 2, Cext = 220 pF ±5%
Figure 2, Rext = 12 k
±1%
Output n-channel
transistors off
V
IN
= V
SS
, V
DD
= 5 V
V
IN
= V
SS
, V
DD
= 5 V
OSC1, OSC2
200
400
790
kHz
Ports with built-in pull-up
resistor specifications
Built-in pull-up resistor I/O ports
RES
RPP
8
14
30
k
Ru
RES
200
500
800
External reset characteristics
Reset time
t
RST
See figure 5.
f = 1 MHz
With all pins except the pin
being tested at V
IN
= V
SS
.
Pin capacitance
Cp
10
pF
Serial clock
Input clock cycle time
t
CKCY
(1)
See figure 6.
SCK
12.0
μs
Output clock cycle time
t
CKCY
(2)
See figure 6.
SCK
64
×
μs
T
CYC
*
9
Input clock low-level pulse
width
t
CKL
(1)
See figure 6.
SCK
4.0
μs
Output clock low-level pulse
width
t
CKL
(2)
See figure 6.
SCK
32
×
T
CYC
μs
Input clock high-level pulse
width
t
CKH
(1)
See figure 6.
SCK
4.0
μs
Output clock high-level pulse
width
t
CKH
(2)
See figure 6.
SCK
32
×
T
CYC
μs
Serial input
Data setup time
t
ICK
Stipulated with respect to
the SCK rising edge.
SI
0.5
μs
Data hold time
t
CKI
See figure 6.
SI
0.5
μs
Serial output
Output delay time
t
CKO
Stipulated with respect to
the SCK falling edge.
With external 1 k
resistors and 50 pF
capacitors on the
n-channel open-drain
outputs only.
See figure 6
SO
2.0
μs
Pulse output
Period
t
PCY
PE0
64
×
T
CYC
32
×
T
CYC
±10%
32
×
T
CYC
±10%
μs
High-level pulse width
t
PH
PE0
μs
Low-level pulse width
t
PL
PE0
μs
See figure 7
T
CYC
= 4
×
<system clock
period>
With external 1 k
resistors and external
50 pF capacitors on the
n-channel open-drain
outputs only.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| LC651431L | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Four-Bit CMOS Microcontrollers for Small-Scale Control Applications |
| LC651431N | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Four-Bit CMOS Microcontrollers for Small-Scale Control Applications |
| LC651432F | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Four-Bit CMOS Microcontrollers for Small-Scale Control Applications |
| LC651432L | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Four-Bit CMOS Microcontrollers for Small-Scale Control Applications |
| LC651432N | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Four-Bit CMOS Microcontrollers for Small-Scale Control Applications |
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