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參數(shù)資料
| 型號： | LA6513A |
| 文件頁數(shù)： | 13/24頁 |
| 文件大小： | 332K |
| 代理商： | LA6513A |
LC6512A, LC6513A
No.2367–13/24
Digit drive signal-used key scan
When key-scanning with the FLT digit drive signal in Fig. 3-3 and inputting the return signal to port A, the following must
be observed.
(a) Estimate voltage drop (V
ON
) in the output transistor using the current flowing in an FLT used and the V-I
characteristic of the output port of the LC6512A, 6513A.
(b) Estimate voltage drop (V
SW
)in the switch circuit.
(c) Check to see that V
ON
+ V
SW
meets the V
IH
/V
IL
requirement of the input port in Fig. 3-1.
For the key scan application in Fig. 3-3, make the program considering the delay in the external circuit and the input delay
shown below.
When the IP instruction is used to input the return signal as shown above, the input delay must be considered and two
instructions are placed between the IP instruction and the crossing of input port waveform and V
IL(4)
, V
IH(1)
, respectively.
Some instructions must be placed additionally according to the length of delay (t
DL
, t
DH
) in the external circuit after the
digit drive signal is delivered with the execution of the OP instruction (point a and point c).
N: Number of instruction cycles existing between instruction (OP, SPB, RPB) used to output data to output port and
instruction (IP, BP, BNP) used to input data from input port.
(Number of instruction cycles to be programmed according to the length of t
DL
, t
DH
)
t
DL
, t
DH
: Delay in external circuit from output port to input port.
Fig. 3-3 Sample key scan application
Fig. 3-4
t
DL
t
DH
(External circuit delay time)
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