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參數(shù)資料
| 型號： | L6996D |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO24 |
| 封裝： | MO-153AD, TSSOP-24 |
| 文件頁數(shù)： | 6/26頁 |
| 文件大?。?/td> | 272K |
| 代理商： | L6996D |
L6996
14/26
To set the current threshold, choose RILIM according to the following equation:
Eq 11
Where KC is the current limit factor (0.25A typ.). A negative current limit is also introduced during dynamic tran-
sitions, when zero-cross comparator is disabled and at the inductor current is allowed to reverse. The negative
current limit is useful when performing a negative transition (that is, output voltage is reduced) to avoid too high
discharging current.
Both positive and negative current limit have the same threshold; but the negative current limit can be set using
the OVP signal plus a transistor, that changes during the dynamic transition, as in Fig. 16 (Q5, R11).
The system accuracy is function of the exactness of the resistance connected to ILIM pin and RSENSE resistor.
Moreover the voltage on ILIM pin must range between 10mV and 2V to ensure the system linearity.
1.6 Protection and fault
Sensing CS- pin voltage performs the output protection. The nature of the fault (that is, latched OV or latched
UV) is given by the PGOOD and OVP pins. If the output voltage is within the 90% 110% range, PGOOD is high.
If an overvoltage or an undervoltage occurs, the device is latched. low side MOSFET is turned ON and high side
MOSFET off. PGOOD goes low. OVP goes high in case of overvoltage, allowing the fault nature to be detected.
To recuperate the functionality either the device must be shut down, thought the SHDN pin, or the supply has
to be removed. These features are useful to protect against short-circuit (UV fault) as well as high side MOSFET
short (OV fault).
1.7 Drivers
The integrated high-current drivers allow using different size of power MOSFET, maintaining fast switching tran-
sition. The driver for the high side MOSFET uses the BOOT pin for supply and PHASE pin for return (floating
driver). The driver for the low side MOSFET uses the VDR pin for the supply and PGND pin for the return. The
main feature is the adaptive anti-cross-conduction protection, which prevents from both high side and low side
MOSFET to be on at the same time, avoiding a high current to flow from VIN to GND. When high side MOSFET
is turned off the voltage on the pin PHASE begins to fall; the low side MOSFET is turned on only when the volt-
age on PHASE pin reaches 250mV. When low side is turned off, high side remains off until LGATE pin voltage
reaches 500mV. This is important since the driver can work properly with a large range of external power MOS-
FETS.
The current necessary to switch the external MOSFETS flows through the device, and it is proportional to the
root square of the MOSFET gate charge and the switching frequency. So the power dissipation of the device is
function of the external power MOSFET gate charge and switching frequency.
Eq 12
Pdriver =VCC QgTOT FSW
The maximum gate charge values for the low side and high side are given from:
Eq 13
Eq 14
Where fSW0 = 500kHz. The equations above are valid for TJ = 150°C. If the system temperature is lower the QG
can be higher.
For the Low Side driver the max output gate charge meets another limit due to the internal traces degradation;
I
M AX_VA L LEY
R
ILIM
R
SENS E
---------------------- K
C
=
Q
MAXHS
f
SW0
f
SW
------------- 75nC
=
Q
MAXLS
f
SW0
f
SW
------------- 125nC
=
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