參數(shù)資料
型號(hào): L6917BDTR
廠商: 意法半導(dǎo)體
英文描述: 5 BIT PROGRAMMABLE DUAL-PHASE CONTROLLER
中文描述: 5位可編程雙相控制器
文件頁(yè)數(shù): 15/27頁(yè)
文件大?。?/td> 411K
代理商: L6917BDTR
15/27
L6917
Figure 9. Active Droop Function Circuit
The feedback current is equal to 50
μ
A at nominal full load (I
FB
= I
INFO1
+ I
INFO2
) and 70
μ
A at the OC threshold,
so the maximum output voltage deviation is equal to:
V
FULL_POSITIVE_LOAD
= +R
FB
· 70
μ
A
V
POSITIVE_OC_THRESHOLD
= +R
FB
· 70
μ
A
Droop function is provided only for positive load; if negative load is applied, and then I
INFOx
< 0, no current is
sunk from the FB pin. The device regulates at the voltage programmed by the VID.
OutputVoltage Protectionand Power Good
The output voltage is monitored by pin VSEN. If it is not within +12/-10% (typ.) of the programmed value, the
powergood output is forced low. Power good is an open drain output and it is enabled only after the soft start is
finished (2048 clock cycles after start-up).
The device provides over voltage protection; when the voltage sensed by the V
SEN
pin reaches 2.1V (typ.), the
controller permanently switches on both the low-side mosfets and switches off both the high-side mosfets in or-
der to protect the CPU. The OSC/INH/FAULT pin is driven high (5V) and power supply (Vcc) turn off and on is
required to restart operations. The over Voltage percentage is set by the ratio between the OVP threshold (set
at 2.1V) and the reference programmed by VID.
Under voltage protection is also provided. If the output voltage drops below the 85% of the reference voltage for
more than one clock period the device turns off all mosfets and waits for 2048 clock cycles before another soft-
start. An Under Voltage event is then managed as an Over Current event; after a combination of three of them,
the device latches the condition and the FAULT is driven high.
Both Over Voltage and Under Voltage are active also during soft start (Under Voltage after than Vout reaches
0.8V). The reference voltage used to determine the UV thresholds is nowthe increasing voltage driven by the
2048 soft start digital counter.
RemoteVoltage Sense
A remote sense buffer is integrated into the device to allow output voltage remotesense implementation without
any additional external components. In this way, the output voltage programmed is regulated between the re-
mote buffer inputs compensating motherboard trace losses or connector losses if the device is used for a VRM
module. The low offset amplifier senses the output voltage remotely through the pins FBR and FBG (FBR is for
the regulated voltage sense while FBG is for the ground sense) and reports this voltage internally at VSEN pin
V
PROG
COMP
FB
To VOUT
I
FB
R
FB
OVP[%]
Reference Voltage
VID
(
)
---------------------------------------------------------------------------- -
100
=
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