參數(shù)資料
型號: L6917BD
廠商: 意法半導體
英文描述: 5 BIT PROGRAMMABLE DUAL-PHASE CONTROLLER
中文描述: 5位可編程雙相控制器
文件頁數(shù): 18/27頁
文件大?。?/td> 411K
代理商: L6917BD
L6917
18/27
Figure 11. Control Loop Scheme
AverageCurrent Mode Compensation NetworkDesign
The average current mode control loop is reported in figure 11. The current information I
FB
sourced by the FB
pin flows into R
FB
implementing the dependence of the output voltage from the read current.
Two different loops are present and precisely a current loop internal to a voltage loop. The current gain (Ac) and
voltage gain (Av) present in the above figure are defined by the following relationships:
The current loop gain may now be expressed by the following equation:
Where
Vosc has a typical value of 2V and Z
F
(s) is the impedance of the series R
F
-C
F
. The current loop gain
is designed to obtain a high DC gain to minimize static error and cross the 0dB axes with a constant -20dB/dec
slope with a crossover frequency
ω
TI
. Neglecting the effect of Z
F
(s), the transfer function has one zero and two
poles. Both the poles are fixed once the output filter is designed and also the zero (
ω
OUT
=1/R
OUT
C
OUT
) is fixed
by the maximum current deliverable by the converter. To obtain the desired shape an R
F
-C
F
series network is
considered for the Z
F
(s) implementation. A zero at
ω
F
=1/R
F
C
F
is then introduced together with an integrator.
This integrator minimizes the static error while placing the zero in correspondence with the L-C resonance a
simple -20dB/dec shape of the gain is assured (See Figure 12).
Rout
Cout
ESR
L
R
FB
R
F
C
F
REF
PWM
I
FB
Av
-Z
F
/R
FB
Ac
Rs/Rg
-Z
F
1/
V
osc
V
COMP
V
OUT
d
V
IN
V
COMP
V
OUT
d
I
FB
I
OUT
Z
F
G
LOOPI
Av s
V
d
---------------
....
{
}
V
IN
1
s
+
ESR C
S
2
C
OUT
L
2
--
s
ESR C
OUT
2 R
OUT
-----------------------
+
1
+
+
-----------------------------------------------------------------------------------------------------------------------------
=
=
=
Ac s
I
d
------------
....
{
}
V
R
OUT
---------------
1
s
+
ESR C
S
2
C
OUT
2
--
s
ESR C
OUT
2 R
OUT
-----------------------
+
1
+
+
-----------------------------------------------------------------------------------------------------------------------------
=
=
=
G
LOOPI
s
( )
Ac s
-----------------------------------------------
Rs Z
s
( )
V
OUT
--------------
1
s
+
ESR C
S
C
OUT
2
--
s
ESR C
OUT
OUT
----------------------
+
1
+
+
------------------------------------------------------------------------------------------------------------------------------
-------
Z
s
( )
-----------------
=
=
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