參數(shù)資料
型號: L6726A
廠商: 意法半導體
英文描述: Single phase PWM controller
中文描述: 單相PWM控制器
文件頁數(shù): 14/24頁
文件大小: 399K
代理商: L6726A
Protections
L6726A
14/24
Figure 6.
OC threshold setting procedure timings (top) and waveforms (bottom)
7.3
Under Voltage Lock Out
In order to avoid anomalous behaviors of the device when the supply voltage is too low to
support its internal rails, UVLO is provided: the device will start up when VCC reaches
UVLO upper threshold and will shutdown when VCC drops below UVLO lower threshold.
The 4.1V maximum UVLO upper threshold allows L6726A to be supplied from 5V and 12V
busses in or-ing diode configuration.
Figure 7.
OCP trip, default threshold, LS: STD38NH02L (left). UVLO turn off (right)
VCC
Enable Th
COMP
700mV
LGATE
PWM ramp
bottom edge
UVLO Th
R
OCSET
not connected
Setting Procedure
VCC
Enable Th
COMP
700mV
LGATE
PWM ramp
bottom edge
UVLO Th
5.5ms - 6.5ms
R
OCSET
connected
Setting Procedure
t
DELAY
t
DELAY
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