參數(shù)資料
型號(hào)： L6714TR
廠商： 意法半導(dǎo)體
英文描述： 4 phase controller with embedded drivers for Intel VR10, VR11 and AMD 6Bit CPUs
中文描述： 4英特爾VR10，VR11和AMD的6位嵌入式CPU的司機(jī)相控制器
文件頁(yè)數(shù)： 39/70頁(yè)
文件大小： 572K
代理商： L6714TR
L6714
Dynamic VID transitions
39/70
13
Dynamic VID transitions
The device is able to manage Dynamic VID Code changes that allow Output Voltage
modification during normal device operation. OVP and UVP signals (and PGOOD in case of
AMD Mode) are masked during every VID transition and they are re-activated after the
transition finishes with a 32 clock cycles delay to prevent from false triggering due to the
transition.
When changing dynamically the regulated voltage (D-VID), the system needs to charge or
discharge the output capacitor accordingly. This means that an extra-current I
D-VID
needs to
be delivered, especially when increasing the output regulated voltage and it must be
considered when setting the over current threshold. This current can be estimated using the
following relationships:
where dV
OUT
is the selected DAC LSB (6.25mV for VR11 and VR10 Extended DAC or 25mV
for AMD DAC) and T
VID
is the time interval between each LSB transition (externally driven).
Overcoming the OC threshold during the dynamic VID causes the device to enter the
constant current limitation slowing down the output voltage dV/dt also causing the failure in
the D-VID test.
L6714 checks for VID code modifications (
See Figure 13
) on the rising edge of an internal
additional DVID-clock and waits for a confirmation on the following falling edge. Once the
new code is stable, on the next rising edge, the reference starts stepping up or down in LSB
increments every VID-clock cycle until the new VID code is reached. During the transition,
VID code changes are ignored; the device re-starts monitoring VID after the transition has
finished on the next rising edge available. VID-clock frequency (F
DVID
) depends on the
operative mode selected: for Intel Mode it is in the range of 1MHz to assure compatibility
with the specifications while, for AMD Mode, this frequency is lowered to about 250kHz.
When L6714 performs a D-VID transition in AMD Mode, DVID pin is pulled high as long as
the device is performing the transition (also including the additional 32clocks delay)
Warning:
If the new VID code is more than 1 LSB different from the
previous, the device will execute the transition stepping the
reference with the DVID-clock frequency F
DVID
until the new
code has reached: for this reason it is recommended to
carefully control the VID change rate in order to carefully
control the slope of the output voltage variation especially in
Intel Mode.
I
D
VID
–
C
OUT
dV
dT
VID
-----------------
=
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