
put switched to phase 2 with output A high and C
low with the Bemf amplifier monitoring output B.
In order to prevent commutation current noise be-
ing detectedm as a false zero crossing, a mask-
ing circuit automatically blanks out all incoming
signals as soon as a zero crossing is detected.
When the next commutation occurs an internal
counter starts counting down to set the time that
the masking pulse remains.
The counter is initially loaded with a number that
is equal to time that is always 25% of the previous
phase period or 15 electrical degrees. The time-
out of the masking pulse shown for reference at
the bottom of figure 4-1. Thus the actual masking
period is the total of the time from the detected
zero crossing to the phase commutation, plus
25% of the previous period. The mask pulse op-
eration is further discussed in section 4.6, Slew
Rate Control and PWM operation.
After the masking period, the Bemf voltage at out-
put B is monitored for a zero crossing. Upon de-
tection of the crossing, the output is commutated
after the selected phase delay insuring maximum
torque. The spin sense waveform at the bottom of
the figure indicates that this output signal toggles
with each zero crossing.
4.2 Brake Delay
When Run/Brake is brought low, a brake is initi-
ated. Referring to figure 4-2, SW1 is opened and
the brake delay capacitor, Cbrake, is allowed to
discharge towards groun via Rbrake.
At the same time, switches SW2 through SW7
bring the gates of the output FETs to ground halt-
ing conduction, causing the motor to coast. While
the motor is coasting, the Bemf is used to park
the heads. When Cbrake reaches a voltage that
is below the turn ON threshold of Q1, Switches
SW8, 9, and 10 bring the gates of the lower driv-
ers to Vbrake potential. This enables the lower
FETs causing a braking action.
The analog and logic supplies are not monitored
in the L6238S, since the L6244 already monitors
this voltage and initiates a Park function when
either supply drops to a predeterminated level.
Figure 4-2
L6238S
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