參數(shù)資料
型號(hào): L5973D
廠商: 意法半導(dǎo)體
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: RADIATION HARDENED HIGH EFFICIENCY, 5 AMP SWITCHING REGULATORS
中文描述: 抗輻射高效,5安培開關(guān)穩(wěn)壓器
文件頁數(shù): 6/13頁
文件大?。?/td> 166K
代理商: L5973D
L5973AD
6/13
Figure 3. Oscillator Circui
CURRENT PROTECTION
The L5973AD has two current limit protections, pulse by pulse and frequency fold back.
The schematic of the current limitation circuitry for the pulse by pulse protection is shown in figure 4.
The output power PDMOS transistor is split in two parallel PDMOS. The smallest one has a resistor in series,
R
SENSE
. The current is sensed through Rsense and if reaches the threshold, the mirror is unbalanced and the
PDMOS is switched off until the next falling edge of the internal clock pulse.
Due to this reduction of the ON time, the output voltage decreases.
Since the minimum switch ON time (necessary to avoid false overcurrent signal) is not enough to obtain a suf-
ficiently low duty cycle at 500KHz, the output current, in strong overcurrent or short circuit conditions, could in-
crease again. For this reason the switching frequency is also reduced, so keeping the inductor current under its
maximum threshold. The Frequency Shifter (see fig. 3) depends on the feedback voltage. As the feedback volt-
age decreases (due to the reduced duty cycle), the switching frequency decreases too.
Figure 4. Current Limitation Circuitry
ERROR AMPLIFIER
The voltage error amplifier is the core of the loop regulation. It is a transconductance operational amplifier whose
non inverting input is connected to the internal voltage reference (1.235V), while the inverting input (FB) is con-
nected to the external divider or directly to the output voltage. The output (COMP) is connected to the external
FREQUENCY
SHIFTER
CLOCK
GENERATOR
RAMP
GENERATOR
SYNCHRONIZATOR
CLOCK
RAMP
Ibias_osc
SYNC
t
D00IN1131
DRIVER
NOT
A1
PWM
VCC
OUT
A1/A2=95
I
L
RSENSE
D00IN1134
I
OFF
I
I
RTH
A2
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