參數(shù)資料
型號(hào)： KSZ9021RN-EVAL
廠商： Micrel Inc
文件頁(yè)數(shù)： 41/58頁(yè)
文件大?。?/td> 0K
描述： BOARD EVALUATION FOR KSZ9021RN
標(biāo)準(zhǔn)包裝： 1
主要目的： 接口，以太網(wǎng)控制器（PHY 和 MAC）
嵌入式： 否
已用 IC / 零件： KSZ9021RN
已供物品： 板
相關(guān)產(chǎn)品： 576-3978-ND - IC TXRX 10/100/1000 SGL 48QFN
576-3637-ND - IC TXRX 10/100/1000 SGL 48QFN
其它名稱： 576-3874
MCP444X/446X
DS22265A-page 46
2010 Microchip Technology Inc.
4.2.2.2
Terminal Control (TCON) Registers
There are two Terminal Control (TCON) Registers.
These are called TCON0 and TCON1. Each register
contains 8 control bits, four bits for each Wiper.
Register 4-2 describes each bit of the TCON0 register,
while Register 4-3 describes each bit of the TCON1
register.
The state of each resistor network terminal connection
is individually controlled. That is, each terminal
connection (A, B and W) can be individually connected/
disconnected from the resistor network. This allows the
system to minimize the currents through the digital
potentiometer.
The value that is written to the specified TCON register
will appear on the appropriate resistor network
terminals when the serial command has completed.
When the WL1 bit is enabled, writes to the TCON0
register bits R1HW, R1A, R1W, and R1B are inhibited.
When the WL0 bit is enabled, writes to the TCON0
register bits R0HW, R0A, R0W, and R0B are inhibited.
When the WL3 bit is enabled, writes to the TCON1
register bits R3HW, R3A, R3W, and R3B are inhibited.
When the WL2 bit is enabled, writes to the TCON1
register bits R2HW, R2A, R2W, and R2B are inhibited.
On a POR/BOR these registers are loaded with
1FFh (9-bit), for all terminals connected. The Host
Controller needs to detect the POR/BOR event and
then update the Volatile TCON register values.
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