hbwhelp@micrel.com or (408) 955-1690 List of Tables Ta" />
參數(shù)資料
型號： KSZ8993FL
廠商： Micrel Inc
文件頁數(shù)： 79/100頁
文件大?。?/td> 0K
描述： IC CONV MED 10/100 SGL 128PQFP
標(biāo)準(zhǔn)包裝： 66
系列： *
類型： *
應(yīng)用： *
安裝類型： 表面貼裝
封裝/外殼： 128-BFQFP
供應(yīng)商設(shè)備封裝： 128-PQFP（14x20）
包裝： 托盤
產(chǎn)品目錄頁面： 1081 (CN2011-ZH PDF)
其它名稱： 576-1035
Micrel, Inc.
KS8993F/FL
June 2009
8
M9999-062509
hbwhelp@micrel.com or (408) 955-1690
List of Tables
Table 1: FX and TX Mode Selection.................................................................................................................................................. 26
Table 2: MDI/MDI-X Pin Definition..................................................................................................................................................... 27
Table 3: MII Signals........................................................................................................................................................................... 35
Table 4: SNI (7-wire) Signals............................................................................................................................................................. 35
Table 5: MII Management Interface frame format ............................................................................................................................. 36
Table 6: Serial Management Interface (SMI) frame format ............................................................................................................... 37
Table 7: FID+DA look up in VLAN mode ........................................................................................................................................... 39
Table 8: FID+SA look up in VLAN mode ........................................................................................................................................... 39
Table 9: KS8993F SPI Connections.................................................................................................................................................. 44
Table 10: Format of Static MAC Table (8 entries) ............................................................................................................................. 79
Table 11: Format of Static VLAN Table (16 entries).......................................................................................................................... 80
Table 12: Format of Dynamic MAC Table (1K entries)...................................................................................................................... 81
Table 13: Format of “Per Port” MIB Counters.................................................................................................................................... 82
Table 14: Port 1’s “Per Port” MIB Counters Indirect Memory Offsets................................................................................................ 82
Table 15: Format of “All Port Dropped Packet” MIB Counters .......................................................................................................... 84
Table 16: “All Port Dropped Packet” MIB Counters Indirect Memory Offsets.................................................................................... 84
Table 17: EEPROM Timing Parameters............................................................................................................................................ 89
Table 18: SNI Timing Parameters ..................................................................................................................................................... 90
Table 19: MAC mode MII Timing Parameters ................................................................................................................................... 91
Table 20: PHY Mode MII Timing Parameters .................................................................................................................................... 92
Table 21: SPI Input Timing Parameters ............................................................................................................................................ 93
Table 22: SPI Output Timing Parameters.......................................................................................................................................... 94
Table 23: Reset Timing Parameters.................................................................................................................................................. 97
Table 24: Transformer Selection Criteria........................................................................................................................................... 99
Table 25: Qualified Single Port Magnetic .......................................................................................................................................... 99
Table 26: Crystal/Oscillator Selection Criteria ................................................................................................................................... 99
List of Figures
Figure 1: Typical Straight Cable Connection ..................................................................................................................................... 28
Figure 2: Typical Crossover Cable Connection ................................................................................................................................. 28
Figure 3: Auto Negotiation and Parallel Detection ............................................................................................................................ 29
Figure 4: Destination Address look up flowchart, stage 1 ................................................................................................................. 31
Figure 5: Destination Address resolution flowchart, stage 2 ............................................................................................................. 32
Figure 6: 802.1p Priority Field Format ............................................................................................................................................... 40
Figure 7: KS8993F EEPROM Configuration Timing Diagram ........................................................................................................... 42
Figure 8: SPI Write Data Cycle ......................................................................................................................................................... 45
Figure 9: SPI Read Data Cycle ......................................................................................................................................................... 45
Figure 10: SPI Multiple Write............................................................................................................................................................. 46
Figure 11: SPI Multiple Read............................................................................................................................................................. 46
Figure 12: EEPROM Interface Input Timing Diagram ....................................................................................................................... 89
Figure 13: EEPROM Interface Output Timing Diagram..................................................................................................................... 89
Figure 14: SNI Input Timing Diagram ................................................................................................................................................ 90
Figure 15: SNI Output Timing Diagram ............................................................................................................................................. 90
Figure 16: MAC Mode MII Timing - Data received from MII .............................................................................................................. 91
Figure 17: MAC Mode MII Timing - Data transmitted to MII .............................................................................................................. 91
Figure 18: PHY Mode MII Timing – Data received from MII .............................................................................................................. 92
Figure 19: PHY Mode MII Timing - Data transmitted to MII ............................................................................................................... 92
Figure 20: SPI Input Timing............................................................................................................................................................... 93
Figure 21: SPI Output Timing ............................................................................................................................................................ 94
Figure 22: MDC/MDIO Timing for MIIM and SMI Interfaces .............................................................................................................. 95
Figure 23: Auto Negotiation Timing ................................................................................................................................................... 96
Figure 24: Reset Timing .................................................................................................................................................................... 97
Figure 25: Recommended Reset Circuit ........................................................................................................................................... 98
Figure 26: Recommended Reset Circuit for interfacing with CPU/FPGA Reset Output.................................................................... 98
Figure 27: 128-pin PQFP Package Outline Drawing ....................................................................................................................... 100
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KSZ8993MLI IC SWITCH 10/100 3PORT 128-PQFP
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KSZ8993FL-EVAL 功能描述:BOARD EVALUATION FOR KSZ8993FL RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 過時/停產(chǎn)零件編號 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:MCU 適用于相關(guān)產(chǎn)品:Freescale MC68HC908LJ/LK（80-QFP ZIF 插口） 所含物品:面板、纜線、軟件、數(shù)據(jù)表和用戶手冊 其它名稱:520-1035
KSZ8993I 功能描述:以太網(wǎng) IC 3 Port 10/100 Switch w/Tranceivers & Frame Buffers, 128-PQFP, I-TEMP RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8993M 功能描述:以太網(wǎng) IC 2+1 Port 10/100 Switch w/Tranceivers & Frame Buffers, 128-Ld PQFP (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8993MA5 功能描述:IC SWITCH 10/100 W/TXRX 128PQFP RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝
KSZ8993M-EVAL 功能描述:以太網(wǎng)開發(fā)工具 KSZ8993M Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓:
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