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參數(shù)資料
| 型號： | KSZ8851SNLI TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 44/80頁 |
| 文件大小： | 0K |
| 描述： | IC ETHERNET CTLR 1PORT PCI 32MLF |
| 標準包裝： | 1 |
| 控制器類型： | 以太網(wǎng)控制器，MAC/PHY |
| 接口： | 總線 |
| 電源電壓： | 1.8V，2.5V，3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，32-MLF? |
| 供應商設備封裝： | 32-MLF?（5x5） |
| 包裝： | 標準包裝 |
| 產(chǎn)品目錄頁面： | 1081 (CN2011-ZH PDF) |
| 其它名稱： | 576-3506-6 |
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Micrel, Inc.
KSZ8851SNL/SNLI
August 2009
49
M9999-083109-2.0
Bit
Default Value
R/W
Description
15-14
0x0
RO
Reserved
13
0x0
RO
TXLC Transmit Late Collision
This bit is set when a transmit Late Collision occurs.
12
0x0
RO
TXMC Transmit Maximum Collision
This bit is set when a transmit Maximum Collision is reached.
11-6
-
RO
Reserved
5-0
-
RO
TXFID Transmit Frame ID
This field identifies the transmitted frame. All of the transmit status information in this
register belongs to the frame with this ID.
Receive Control Register 1 (0x74 – 0x75): RXCR1
This register holds control information programmed by the CPU to control the receive function.
Bit
Default Value
R/W
Description
15
0x0
RW
FRXQ Flush Receive Queue
When this bit is set, The receive queue memory is cleared and RX frame pointer is reset.
Note: Disable the RXE receive enable bit[0] first before set this bit, then clear this bit to
normal operation.
14
0x0
RW
RXUDPFCC Receive UDP Frame Checksum Check Enable
When this bit is set, the KSZ8851SNL will check for correct UDP checksum for incoming
UDP frames. Any received UDP frames with incorrect checksum will be discarded.
13
0x0
RW
RXTCPFCC Receive TCP Frame Checksum Check Enable
When this bit is set, the KSZ8851SNL will check for correct TCP checksum for incoming
TCP frames. Any received TCP frames with incorrect checksum will be discarded.
12
0x0
RW
RXIPFCC Receive IP Frame Checksum Check Enable
When this bit is set, the KSZ8851SNL will check for correct IP header checksum for
incoming IP frames. Any received IP frames with incorrect checksum will be discarded.
11
0x1
RW
RXPAFMA Receive Physical Address Filtering with MAC Address Enable
When this bit is set, this bit enables the RX function to receive physical address that pass
the MAC address filtering mechanism (see Address Filtering Scheme in Table 3 for
detail).
10
0x0
RW
RXFCE Receive Flow Control Enable
When this bit is set and the KSZ8851SNL is in full-duplex mode, flow control is enabled,
and the KSZ8851SNL will acknowledge a PAUSE frame from the receive interface; i.e.,
the outgoing packets are pending in the transmit buffer until the PAUSE frame control
timer expires. This field has no meaning in half-duplex mode and should be programmed
to 0.
When this bit is cleared, flow control is not enabled.
9
0x0
RW
RXEFE Receive Error Frame Enable
When this bit is set, CRC error frames are allowed to be received into the RX queue.
When this bit is cleared, all CRC error frames are discarded.
8
0x0
RW
RXMAFMA Receive Multicast Address Filtering with MAC Address Enable
When this bit is set, this bit enables the RX function to receive multicast address that pass
the MAC address filtering mechanism (see Address Filtering Scheme in Table 3 for
detail).
7
0x0
RW
RXBE Receive Broadcast Enable
When this bit is set, the RX module receives all the broadcast frames.
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相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8851SNLTR | 制造商:Micrel Inc 功能描述: |
| KSZ8851SNL-TR | 功能描述:Ethernet Controller 10/100 Base-T/TX PHY SPI Interface 32-MLF? (5x5) 制造商:microchip technology 系列:- 包裝:剪切帶（CT） 零件狀態(tài):有效 協(xié)議:以太網(wǎng) 功能:控制器 接口:SPI 標準:10/100 Base-T/TX PHY 電壓 - 電源:1.8V，2.5V，3.3V 電流 - 電源:- 工作溫度:0°C ~ 70°C 封裝/外殼:32-VFQFN 裸露焊盤，32-MLF? 供應商器件封裝:32-MLF?（5x5） 標準包裝:1 |
| KSZ8852HLE-EVAL | 功能描述:KSZ8852HLE - Interface, Ethernet Control Evaluation Board 制造商:microchip technology 系列:- 零件狀態(tài):有效 主要用途:接口，以太網(wǎng)控制 嵌入式:否 使用的 IC/零件:KSZ8852HLE 主要屬性:- 輔助屬性:- 所含物品:板 標準包裝:1 |
| KSZ8852HLEWA | 功能描述:Ethernet Switch 10/100 Base-FX/T/TX PHY Ethernet Interface 64-LQFP (10x10) 制造商:microchip technology 系列:- 包裝:托盤 零件狀態(tài):有效 協(xié)議:以太網(wǎng) 功能:開關 接口:以太網(wǎng) 標準:10/100 Base-FX/T/TX PHY 電壓 - 電源:3.3V 電流 - 電源:- 工作溫度:-40°C ~ 115°C 封裝/外殼:64-LQFP 裸露焊盤 供應商器件封裝:64-LQFP（10x10） 標準包裝:160 |
| KSZ8852HLEYA | 功能描述:Ethernet Switch 10/100 Base-FX/T/TX PHY Ethernet Interface 64-LQFP (10x10) 制造商:microchip technology 系列:- 包裝:托盤 零件狀態(tài):有效 協(xié)議:以太網(wǎng) 功能:開關 接口:以太網(wǎng) 標準:10/100 Base-FX/T/TX PHY 電壓 - 電源:3.3V 電流 - 電源:- 工作溫度:-40°C ~ 115°C 封裝/外殼:64-LQFP 裸露焊盤 供應商器件封裝:64-LQFP（10x10） 標準包裝:160 |
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