參數(shù)資料
型號： KSZ8851-16MLLI TR
廠商： Micrel Inc
文件頁數(shù)： 70/84頁
文件大小： 0K
描述： IC MAC CTLR 1PORT W/BUS 48LQFP
標準包裝： 1,000
控制器類型： 以太網(wǎng)控制器，MAC/PHY
接口： 總線
電源電壓： 1.8V，2.5V，3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應商設備封裝： 48-LQFP（7x7）
包裝： 帶卷 (TR)
PIC16F7X
DS30325B-page 70
2002 Microchip Technology Inc.
REGISTER 10-2:
RCSTA: RECEIVE STATUS AND CONTROL REGISTER (ADDRESS 18h)
R/W-0
U-0
R-0
R-x
SPEN
RX9
SREN
CREN
—
FERR
OERR
RX9D
bit 7
bit 0
bit 7
SPEN: Serial Port Enable bit
1
= Serial port enabled (configures RC7/RX/DT and RC6/TX/CK pins as serial port pins)
0
= Serial port disabled
bit 6
RX9: 9-bit Receive Enable bit
1
= Selects 9-bit reception
0
= Selects 8-bit reception
bit 5
SREN: Single Receive Enable bit
Asynchronous mode:
Don’t care
Synchronous mode - Master:
1
= Enables single receive
0
= Disables single receive
This bit is cleared after reception is complete.
Synchronous mode - Slave:
Don’t care
bit 4
CREN: Continuous Receive Enable bit
Asynchronous mode:
1
= Enables continuous receive
0
= Disables continuous receive
Synchronous mode:
1
= Enables continuous receive until enable bit CREN is cleared (CREN overrides SREN)
0
= Disables continuous receive
bit 3
Unimplemented: Read as '0'
bit 2
FERR: Framing Error bit
1
= Framing error (can be updated by reading RCREG register and receive next valid byte)
0
= No framing error
bit 1
OERR: Overrun Error bit
1
= Overrun error (can be cleared by clearing bit CREN)
0
= No overrun error
bit 0
RX9D: 9th bit of Received Data
Can be parity bit (parity to be calculated by firmware)
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR reset
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
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