參數(shù)資料
型號: KSZ8851-16MLLI TR
廠商: Micrel Inc
文件頁數(shù): 37/84頁
文件大?。?/td> 0K
描述: IC MAC CTLR 1PORT W/BUS 48LQFP
標(biāo)準(zhǔn)包裝: 1,000
控制器類型: 以太網(wǎng)控制器,MAC/PHY
接口: 總線
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 帶卷 (TR)
Micrel, Inc.
KSZ8851-16MLL/MLLI
March 11, 2014
42
Revision 2.2
Memory BIST Info Register (0x24 – 0x25): MBIR
This register indicates the build-in self-test result for both TX and RX memories after power-up/reset.
Bit
Default Value
R/W
Description
15-13
0x0
RO
Reserved.
12
-
RO
TXMBF TX Memory BIST Test Finish
When set, it indicates the Memory Built In Self Test completion for the TX Memory.
11
-
RO
TXMBFA TX Memory BIST Test Fail
When set, it indicates the TX Memory Built In Self Test has failed.
10-8
-
RO
TXMBFC TX Memory BIST Test Fail Count
To indicate the TX Memory Built In Self Test failed count
7-5
-
RO
Reserved.
4
-
RO
RXMBF RX Memory Bist Finish
When set, it indicates the Memory Built In Self Test completion for the RX Memory.
3
-
RO
RXMBFA RX Memory Bist Fail
When set, it indicates the RX Memory Built In Self Test has failed.
2-0
-
RO
RXMBFC RX Memory BIST Test Fail Count
To indicate the RX Memory Built In Self Test failed count.
Global Reset Register (0x26 – 0x27): GRR
This register controls the global and QMU reset functions with information programmed by the CPU.
Bit
Default Value
R/W
Description
15-2
0x0000
RO
Reserved.
1
0
RW
QMU Module Soft Reset
1: Software reset is active to clear both TXQ and RXQ memories.
0: Software reset is inactive.
QMU software reset will flush out all TX/RX packet data inside the TXQ and RXQ memories
and reset all QMU registers to default value.
0
RW
Global Soft Reset
1: Software reset is active.
0: Software reset is inactive.
Global software reset will affect PHY, MAC, QMU, DMA, and the switch core, all registers
value are set to default value.
0x28 – 0x29: Reserved
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