參數(shù)資料
型號(hào)： KSZ8695P
廠商： Micrel Inc
文件頁(yè)數(shù)： 25/42頁(yè)
文件大?。?/td> 0K
描述： IC ARM9 W/MMU PHY 10/100 289PBGA
標(biāo)準(zhǔn)包裝： 84
系列： *
類(lèi)型： *
應(yīng)用： *
安裝類(lèi)型： 表面貼裝
封裝/外殼： 289-PBGA
供應(yīng)商設(shè)備封裝： 289-PBGA（19x19）
包裝： 管件
配用： 576-1623-ND - BOARD EVALUATION KSZ8695P-MMB
其它名稱(chēng)： 576-1509-5
KSZ8695P-ND
Micrel, Inc.
KS8695P
May 2006
31
M9999-051806
Advanced Memory Interface (SDRAM/ROM/FLASH/SRAM/EXTERNAL I/O) (continued)
Pin
Name
I/O Type
(1)
Description
P7
R7
P8
R8
T8
U8
P9
R9
T9
U9
P10
R10
T10
U10
P11
R11
T11
U11
P12
R12
T12
U12
P13
R13
T13
U13
P14
R14
T14
U14
T15
U15
DATA[31]
DATA[30]
DATA[29]
DATA[28]
DATA[27]
DATA[26]
DATA[25]
DATA[24]
DATA[23]
DATA[22]
DATA[21]
DATA[20]
DATA[19]
DATA[18]
DATA[17]
DATA[16]
DATA[15]
DATA[14]
DATA[13]
DATA[12]
DATA[11]
DATA[10]
DATA[9]
DATA[8]
DATA[7]
DATA[6]
DATA[5]
DATA[4]
DATA[3]
DATA[2]
DATA[1]
DATA[0]
I/O
External Data Bus. 32-Bit bi-directional data bus for data transfer. The KS8695P
also supports 8-bit and 16-bit data bus widths.
R4
P5
SDCSN[1]
SDCSN[0]
O
SDRAM Chip Select: Active low chip select pins for SDRAM. The KS8695P
supports up to two SDRAM banks. One SDCSN output is provided for each bank.
R5
SDRASN
O
SDRAM Row Address Strobe: Active low. The row address strobe pin for SDRAM.
T5
SDCASN
O
SDRAM Column Address Strobe: Active low. The column address strobe pin for
SDRAM.
U5
SDWEN
O
SDRAM Write Enable: Active low. The write enable signal for SDRAM.
P6
R6
T6
U6
SDQM[3]
SDQM[2]
SDQM[1]
SDQM[0]
O
SDRAM Data Input/Output Mask: Data input/output mask signals for SDRAM. The
SDQM is sampled high and is an output mask signal for write accesses and an
output enable signal for read accesses. Input data are masked during a write cycle.
The SDQM0/1/2/3 correspond to DATA[7:0], DATA[15:8], DATA[23:16] and
DATA[31:24], respectively.
U16
T16
R16
ECSN[2]
ECSN[1]
ECSN[0]
O
External I/O Device Chip Select: Active low. Three external I/O banks are provided
for external memory mapped I/O operations. Each I/O bank stores up to 16KB.
The ECSNx signals indicate which of the three I/O banks is selected.
P16
EWAITN
I
External Wait: Active low. This signal is asserted when an external I/O device or a
ROM/SRAM/FLASH bank needs more access cycles than those dened in the
corresponding control register.
R15
P15
RCSN[1]
RCSN[0]
O
ROM/SRAM/FLASH Chip Select: Active low. The KS8695P can access up to two
external ROM/SRAM/FLASH memory banks. The RCSN pins can be controlled to
map the CPU addresses into physical memory banks.
Note
:
1. I = Input.
O = Output.
I/O = Bidirectional.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KSZ8695PI 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Multi-Port PCI Gateway Solution (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
KSZ8695P-MDP-EVAL 功能描述:網(wǎng)絡(luò)開(kāi)發(fā)工具 KSZ88695P-MDP Evaluation Board RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類(lèi)型:Ethernet to Wi-Fi Bridges 工具用于評(píng)估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類(lèi)型:802.11 b/g, Ethernet 工作電源電壓:3.3 V
KSZ8695P-MMB-EVAL 功能描述:網(wǎng)絡(luò)開(kāi)發(fā)工具 KSZ8695P-MMB Evaluation Board RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類(lèi)型:Ethernet to Wi-Fi Bridges 工具用于評(píng)估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類(lèi)型:802.11 b/g, Ethernet 工作電源電壓:3.3 V
KSZ8695PX 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Integrated Multi-Port Gateway Solution w/ Single PCI(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
KSZ8695PX-EVAL 功能描述:網(wǎng)絡(luò)開(kāi)發(fā)工具 KSZ8695PX Evaluation Board RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類(lèi)型:Ethernet to Wi-Fi Bridges 工具用于評(píng)估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類(lèi)型:802.11 b/g, Ethernet 工作電源電壓:3.3 V
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