參數(shù)資料
型號: KSZ8695P
廠商: Micrel Inc
文件頁數(shù): 21/42頁
文件大小: 0K
描述: IC ARM9 W/MMU PHY 10/100 289PBGA
標(biāo)準(zhǔn)包裝: 84
系列: *
類型: *
應(yīng)用: *
安裝類型: 表面貼裝
封裝/外殼: 289-PBGA
供應(yīng)商設(shè)備封裝: 289-PBGA(19x19)
包裝: 管件
配用: 576-1623-ND - BOARD EVALUATION KSZ8695P-MMB
其它名稱: 576-1509-5
KSZ8695P-ND
Micrel, Inc.
KS8695P
May 2006
28
M9999-051806
General Purpose I/O Pins (continued)
Pin
Name
I/O Type
(1)
Description
D4
PCLK
I
PCI bus clock.This signal provides the timing for the PCI bus transactions. This
signal is used to drive the PCI bus interface and the internal PCI logic. All PCI bus
signals are sampled on the rising edges of the PCLK. PCLK can operate from
20MHz to 33MHz. For host mode, use PCLKOUT0 signal to drive this input. In
guest mode, use the system PCI clock to drive this input.
C2
GNT3N
O
PCI bus grant 3. Active low. In host bridge mode, this is an output signal from the
internal PCI arbiter to grant PCI bus access to the device connected to REQ3N. In
guest bridge mode, this signal is reserved.
C3
GNT2N
O
PCI bus grant 2. Active low. In host bridge mode, this is an output signal from the
internal PCI arbiter to grant PCI bus access to the device connected to REQ2N. In
guest bridge mode, this signal is reserved.
C4
GNT1N
O
PCI bus grant 1. Active low. In host bridge mode, this is an output signal from the
internal PCI arbiter to grant PCI bus access to the device connected to REQ1N. In
guest bridge mode, this signal is an output to indicate that the KS8695P is
requesting to access the PCI bus as a PCI master. In guest bridge mode, this is
basically the KS8695P’s request output.
B2
REQ3N
I
PCI bus request 3. Active low. In host bridge mode, this is an input signal from the
external PCI device to request PCI bus access. In guest bridge mode, this signal is
reserved.
B3
REQ2N
I
PCI bus request 2. Active low. In host bridge mode, this is an input signal from the
external PCI device to request PCI bus access.In guest bridge mode, this signal is
reserved.
B4
REQ1N
I
PCI bus request 1. Active low. In host bridge mode, this is an input signal from the
external PCI device to request PCI bus access. In guest bridge mode, this is an
input signal from an external PCI bus arbiter granting access to the bus. In guest
bridge, this is basically the KS8695P's grant input.
A4
D5
B5
C5
A5
D6
B6
C6
B7
C7
A7
D8
B8
D9
A8
C9
D12
B12
C12
A12
D13
B13
C13
A13
B14
C14
A14
D15
B15
PAD31
PAD30
PAD29
PAD28
PAD27
PAD26
PAD25
PAD24
PAD23
PAD22
PAD21
PAD20
PAD19
PAD18
PAD17
PAD16
PAD15
PAD14
PAD13
PAD12
PAD11
PAD10
PAD9
PAD8
PAD7
PAD6
PAD5
PAD4
PAD3
I/O
32-Bit PCI address and data. PCI bus transactions consist of an address phase
followed by one or more data phases. Address and data signals are multiplexed on
the same pins. For a PCI write transaction, the source of the data is the KS8695P.
For a PCI read transaction, the data source is the target. The KS8695P supports
both read and write burst transactions. In the case of a read transaction, a special
data turn around cycle is needed between the address phase and the data
phase(s).
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KSZ8695PI 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Multi-Port PCI Gateway Solution (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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KSZ8695P-MMB-EVAL 功能描述:網(wǎng)絡(luò)開發(fā)工具 KSZ8695P-MMB Evaluation Board RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V
KSZ8695PX 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Integrated Multi-Port Gateway Solution w/ Single PCI(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
KSZ8695PX-EVAL 功能描述:網(wǎng)絡(luò)開發(fā)工具 KSZ8695PX Evaluation Board RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V