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| 型號： | KSZ8051RNLI TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 24/59頁 |
| 文件大小： | 0K |
| 描述： | TXRX PHY 10/T100 3.3V RMII 32QFN |
| 特色產(chǎn)品： | KSZ8051/8031/8021 Series |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | PHY 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | RMII |
| 電源電壓： | 1.8V，2.5V，3.3V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 32-QFN（5x5） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | 576-3889-6 |
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MCP414X/416X/424X/426X
DS22059B-page 30
2008 Microchip Technology Inc.
4.2.1
NON-VOLATILE MEMORY
(EEPROM)
This memory can be grouped into two uses of
non-volatile memory. These are:
The non-volatile wipers starts functioning below the
devices VPOR/VBOR trip point.
4.2.1.1
General Purpose Registers
These locations allow the user to store up to 10 (9-bit)
locations worth of information.
4.2.1.2
Non-Volatile Wiper Registers
These locations contain the wiper values that are
loaded into the corresponding volatile wiper register
whenever the device has a POR/BOR event. There are
up to two registers, one for each resistor network.
The non-volatile wiper register enables stand-alone
operation of the device (without Microcontroller control)
after being programmed to the desired value.
4.2.1.3
Factory Initialization of Non-Volatile
Memory (EEPROM)
The Non-Volatile Wiper values will be initialized to
mid-scale value. This is shown in Table 4-2.
The General purpose EEPROM memory will be
programmed to a default value of 0xFF.
It is good practice in the manufacturing flow to
configure the device to your desired settings.
TABLE 4-2:
DEFAULT FACTORY
SETTINGS SELECTION
4.2.1.4
Special Features
There are 3 non-volatile bits that are not directly
mapped into the address space. These bits control the
following functions:
EEPROM Write Protect
WiperLock Technology for Non-Volatile Wiper 0
WiperLock Technology for Non-Volatile Wiper 1
The operation of WiperLock Technology is discussed in
. The state of the WL0, WL1, and WP bits
is reflected in the STATUS register (see Register 4-1).
EEPROM Write Protect
All internal EEPROM memory can be Write Protected.
When EEPROM memory is Write Protected, Write
commands to the internal EEPROM are prevented.
Write Protect (WP) can be enabled/disabled by two
methods. These are:
External WP Hardware pin (MCP42X1 devices
only)
Non-Volatile configuration bit
High Voltage commands are required to enable and
disable the nonvolatile WP bit. These commands are
To write to EEPROM, both the external WP pin and the
internal WP EEPROM bit must be disabled. Write
Protect does not block commands to the volatile
registers.
4.2.2
VOLATILE MEMORY (RAM)
There are four Volatile Memory locations. These are:
Volatile Wiper 0
Volatile Wiper 1
(Dual Resistor Network devices only)
Status Register
Terminal Control (TCON) Register
The volatile memory starts functioning at the RAM
retention voltage (VRAM).
Resist
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Code
Ty
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R
AB
Va
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e
Default
POR
Wi
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tt
in
g
Wiper
Code
W
iper
L
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T
ech
no
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W
rite
Pro
tect
Settin
g
8-bit 7-bit
-502
5.0 k
Ω
Mid-scale 80h
40h
Disabled
-103
10.0 k
Ω Mid-scale 80h
40h
Disabled
-503
50.0 k
Ω Mid-scale 80h
40h
Disabled
-104
100.0 k
Ω Mid-scale 80h
40h
Disabled
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