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參數(shù)資料
| 型號： | KS8999I |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 20/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH 9-PORT 10/100 208-PQFP |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 系列： | * |
| 類型： | * |
| 應(yīng)用： | * |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 208-MQFP，208-PQFP |
| 供應(yīng)商設(shè)備封裝： | 208-PQFP（28x28） |
| 包裝： | 散裝 |
| 配用： | 576-1023-ND - BOARD EVAL EXPERIMENT FOR KS8999 |
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January 2005
27
KS8999
Micrel
The table below briefly summarizes priority features. For more detailed settings see the EEPROM register description.
Register(s)
Bit(s)
Global/Port
Description
General
2
3-2
Global
Priority Control Scheme: Transmit buffer high/low interleave control
2
1
Global
Priority Buffer Reserve: Reserves 6KB of the buffer for high priority traffic
4-12
0
Port
Enable Port Queue Split: Splits the transmit queue on the desired port for high and low
priority traffic
DSCP Priority
4-12
5
Port
Enable Port DSCP: Looks at DSCP field in IP header to decide high or low priority
40-47
7-0
Global
DSCP Priority Points: Fully decoded 64 bit register used to determine priority from
DSCP field (6 bits) in the IP header
802.1p Priority
4-12
4
Port
Enable Port 802.1p Priority: Uses the 802.1p priority tag (3 bits) to determine frame
priority
3
7-0
Global
Priority Classification: Determines which tag values have high priority
Per Port Priority
4-12
3
Port
Enable Port Priority: Determines which ports have high or low priority traffic
Table 3. Priority Control
VLAN Operation
The VLAN’s are setup by programming the VLAN Mask Registers in the EEPROM. The perspective of the VLAN is from the
input port and which output ports it sees directly through the switch. For example if port 1 only participated in a VLAN with ports
2 and 9 then one would set bits 0 and 7 in register 13 (Port 1 VLAN Mask Register). Note that different ports can be setup
independently. An example of this would be where a router is connected to port 9 and each of the other ports would work
autonomously. In this configuration ports 1 through 8 would only set the mask for port 9 and port 9 would set the mask for ports1
through 8. In this way, the router could see all ports and each of the other individual ports would only communicate with the
router.
All multicast and broadcast frames adhere to the VLAN configuration. Unicast frame treatment is a function of register 2 bit
0. If this bit is set then unicast frames only see ports within their VLAN. If this bit is cleared unicast frames can traverse VLAN’s.
VLAN tags can be added or removed on a per port basis. Further, there are provisions to specify the tag value to be inserted
on a per port basis.
The table below briefly summarizes VLAN features. For more detailed settings see the EEPROM register description.
Register(s)
Bit(s)
Global/Port
Description
4-12
2
Port
Insert VLAN Tags: If specified, will add VLAN tags to frames without existing tags
4-12
1
Port
Strip VLAN Tags: If specified, will remove VLAN tags from frames if they exist
2
0
Global
VLAN Enforcement: Allows unicast frames to adhere or ignore the VLAN configuration
13-21
7-0
Port
VLAN Mask Registers: Allows configuration of individual VLAN grouping.
22-39
7-0
Port
VLAN Tag Insertion Values: Specifies the VLAN tag to be inserted if enabled (see above)
Table 4. VLAN Control
Station MAC Address (control frames only)
The MAC source address can be programmed as used in flow control frames. The table below briefly summarizes this
programmable feature.
Register(s)
Bit(s)
Global/Port
Description
48-53
7-0
Global
Station MAC Address: Used as source address for MAC control frames as used in full
duplex flow control mechanisms.
Table 5. Misc. Control
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