參數(shù)資料
型號: KS8995XA
廠商: Micrel Inc
文件頁數(shù): 27/51頁
文件大?。?/td> 0K
描述: IC SWITCH 10/100 5PORT 128PQFP
標準包裝: 66
系列: *
類型: *
應(yīng)用: *
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應(yīng)商設(shè)備封裝: 128-PQFP(14x20)
包裝: 散裝
配用: 576-1604-ND - EVAL KIT EXPERIMENTAL KS8995XA
May 2005
33
M9999-051305
KS8995XA
Micrel, Inc.
Address
Name
Description
Mode
Default
Register 11 (0x0B): Global Control 9
7-4
Reserved
N/A
0
3
PHY power save
0 = disable PHY power save mode.
R/W
0
1 = enable PHY power save mode.
2
Factory setting
Reserved
R/W
0
1
LED mode
0 = led mode 0
R/W
Pin SMRXD0 strap
1 = led mode 1
option. Pull-down(0):
Enabled led mode 0.
Pull-up(1): Enabled.
led mode 1.
Note: SMRXD0 has
internal pull-down 0.
Mode 0
Mode 1
LEDX_2
Lnk/Act
100Lnk/Act
LEDX_1
Fulld/Col
10Lnk/Act
LEDX_0
Speed
Fulld
0
Reserved
RW
0
Port Registers
The following registers are used to enable features that are assigned on a per port basis. The register bit assignments are
the same for all ports, but the address for each port is different, as indicated.
Register 16 (0x10): Port 1 Control 0
Register 32 (0x20): Port 2 Control 0
Register 48 (0x30): Port 3 Control 0
Register 64 (0x40): Port 4 Control 0
Register 80 (0x50): Port 5 Control 0
Address
Name
Description
Mode
Default
7
Broadcast storm
1 = enable broadcast storm protection for ingress
R/W
0
protection enable
packets on the port.
0 = disable broadcast storm protection.
6
DiffServ priority
1 = enable DiffServ priority classification for ingress
R/W
0
classification enable
packets on port.
0 = disable DiffServ function.
5
802.1p priority
1 = enable 802.1p priority classification for ingress
R/W
0
classification enable
packets on port.
0 = disable 802.1p.
4
Port-based priority
1 = ingress packets on the port will be classified as high
R/W
0
classification enable
priority if “DiffServ” or “802.1p” classification is not
enabled or fails to classify.
0 = ingress packets on port will be classified as low
priority if “DiffServ” or “802.1p” classification is not
enabled or fails to classify.
Note: “DiffServ”, “802.1p” and port priority can be
enabled at the same time. The OR’ed result of 802.1p
and DSCP overwrites the port priority.
3
Reserved
R/W
0
2
Tag insertion
1 = when packets are output on the port, the switch will
R/W
0
add 802.1q tags to packets without 802.1q tags when
received. The switch will not add tags to packets already
tagged. The tag inserted is the ingress port’s “port VID.”
0 = disable tag insertion.
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