參數(shù)資料
型號: KS8995MI
廠商: Micrel Inc
文件頁數(shù): 27/73頁
文件大小: 0K
描述: IC SWITCH 10/100 5PORT 128PQFP
標(biāo)準(zhǔn)包裝: 66
系列: *
類型: *
應(yīng)用: *
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應(yīng)商設(shè)備封裝: 128-PQFP(14x20)
包裝: 散裝
其它名稱: 576-1020
December 2003
33
M9999-120403
KS8995M
Micrel
Configuration Interface
The KS8995M can function as a managed switch or unmanaged switch. If no EEPROM or micro-controller exists, the
KS8995M will operate from its default setting. Some default settings are configured via strap in options as indicated in the table
below.
Pin #
Pin Name
PU/PD
Description
1
TEST1
NC
NC for normal operation. Factory test pin.
45
MUX1
NC
MUX1 and MUX2 should be left unconnected for normal operation.
46
MUX2
NC
They are factory test pins
Mode
Mux1
Mux2
Normal Operation
NC
Remote Analog Loopback Mode for Testing only
0
1
Reserved
1
0
Power Save Mode for Testing only
1
62
PMRXD3
Ipd/O
PHY[5] MII receive bit 3. Strap option: PD (default) = enable flow control;
PU = disable flow control.
63
PMRXD2
Ipd/O
PHY[5] MII receive bit 2. Strap option: PD (default) = disable back pressure;
PU = enable back pressure.
64
PMRXD1
Ipd/O
PHY[5] MII receive bit 1. Strap option: PD (default) = drop excessive collision
packets; PU = does not drop excessive collision packets.
65
PMRXD0
Ipd/O
PHY[5] MII receive bit 0. Strap option: PD (default) = disable aggressive back-off
algorithm in half-duplex mode; PU = enable for performance enhancement.
66
PMRXER
Ipd/O
PHY[5] MII receive error. Strap option: PD (default) = 1522/1518 bytes;
PU = packet size up to 1536 bytes.
67
PCRS
Ipd/O
PHY[5] MII carrier sense/Force duplex mode. See
“Register 76” for port 4 only.
PD (default) = Force half-duplex if auto-negotiation is disabled or fails. PU = Force
full-duplex if auto-negotiation is disabled or fails.
68
PCOL
Ipd/O
PHY[5] MII collision detect/ Force flow control. See
“Register 66” for port 4 only.
PD (default) = No force flow control. PU = Force flow control.
80
SMRXD3
Ipd/O
Switch MII receive bit 3. Strap option: PD (default) = Disable Switch MII full-duplex
flow control; PU = Enable Switch MII full-duplex flow control.
81
SMRXD2
Ipd/O
Switch MII receive bit 2. Strap option: PD (default) = Switch MII in full-duplex mode;
PU = Switch MII in half-duplex mode.
82
SMRXD1
Ipd/O
Switch MII receive bit 1. Strap option: PD (default) = Switch MII in 100Mbps mode;
PU = Switch MII in 10Mbps mode.
83
SMRXD0
Ipd/O
Switch MII receive bit 0; Strap option: LED Mode PD (default) = Mode 0;
PU = Mode 1. See
“Register 11.”
Mode 0
Mode 1
LEDX_2
Lnk/Act
100Lnk/Act
LEDX_1
Fulld/Col
10Lnk/Act
LEDX_0
Speed
Fulld
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