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參數(shù)資料
| 型號： | KS0724 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 65 COM / 132 SEG DRIVER & CONTROLLER FOR STN LCD |
| 中文描述： | 65的COM / 132賽格驅(qū)動 |
| 文件頁數(shù)： | 22/66頁 |
| 文件大?。?/td> | 899K |
| 代理商： | KS0724 |
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65 COM / 132 SEG DRIVER & CONTROLLER FOR STN LCD PRELIMINARY SPEC. VER. 0.8 KS0724
18
Column Address Circuit
Column Address circuit has an 8-bit preset counter that provides column address to the Display Data RAM as
shown in figure 8. When set Column Address MSB / LSB instruction is issued, 8-bit [Y7:Y0] is updated. And, since
this address is increased by 1 each a read or write data instruction, microprocessor can access the display data
continuously. However, the counter is not increased and locked if a non-existing address above 84H. It is
unlocked if a column address is set again by set Column Address MSB / LSB instruction. And the Column
Address counter is independent of page address register.
ADC select instruction makes it possible to invert the relationship between the Column Address and the segment
outputs. It is necessary to rewrite the display data on built-in RAM after issuing ADC Select instruction. Refer to
the following figure 7.
SEG output
SEG
0
00H
1
SEG
1
01H
0
SEG
2
02H
1
SEG
3
03H
0
... ...
SEG
128
80H
1
SEG
129
81H
1
SEG
130
82H
0
SEG
131
83H
0
Column address [Y7:Y0]
Display data
LCD panel display
(ADC = 0)
... ...
... ...
LCD panel display
( ADC = 1 )
... ...
Figure 7. The Relationship between the Column Address and the Segment Outputs
Segment Control Circuit
This circuit controls the display data by the display ON / OFF, reverse display ON / OFF and entire display ON /
OFF instructions without changing the data in the display data RAM.
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