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| 型號(hào)： | KM736V695 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 64Kx36-Bit Synchronous Pipelined Burst SRAM(64Kx36位同步流水線脈沖 靜態(tài) RAM) |
| 中文描述： | 64Kx36位同步流水線突發(fā)靜態(tài)存儲(chǔ)器（64Kx36位同步流水線脈沖靜態(tài)內(nèi)存） |
| 文件頁(yè)數(shù)： | 7/15頁(yè) |
| 文件大?。?/td> | 314K |
| 代理商： | KM736V695 |
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PRELIMINARY
KM736V695/L
64Kx36 Synchronous SRAM
- 7 -
Rev 1.1
April 1997
TEST CONDITIONS
(T
A
=0 to 70
°
C, V
DD
=3.3V
±
5%, V
DDQ
=2.5V+0.4V/-0.13Vunless otherwise specified)
Parameter
Value
Input Pulse Level
0 to 2.5V
Input Rise and Fall Time(Measured at 0.3V and 2.1V)
2ns
Input and Output Timing Reference Levels
V
DDQ
/2
See Fig. 1
Output Load
DC ELECTRICAL CHARACTERISTICS
(V
DD
=3.3V
±
5%, V
DDQ
=2.5V+0.4V/-0.13V or T
A
=0 to 70
°
C)
Parameter
Symbol
Test Conditions
Min
Max
Unit
Input Leakage Current(except ZZ)
I
IL
V
DD
= V
SS
to V
DD
, V
IN
= V
SS
to V
DD
-2
+2
μ
A
μ
A
Output Leakage Current
I
OL
Output Disabled,
V
OUT
=
V
SS
to V
DDQ
Device Selected, I
OUT
=0mA, ZZ
≤
V
IL
,
All Inputs=V
IL
or V
IH
Cycle Time
≥
t
CYC
min
-2
+2
Operating Current
I
CC
-7
-
360
mA
-8
-
330
-10
-
300
Standby Current
I
SB
Device deselected, I
OUT
= 0mA, ZZ
≤
V
IL
,
f=Max, All Inputs
≤
0.2V or
≥
V
DD
-0.2V
-
60
mA
I
SB1
Device deselected, I
OUT
= 0mA,
ZZ
≤
V
DD
-0.2V, f=0,
All Inputs=fixed (V
DD
-0.2V or 0.2V)
-
10
mA
I
SB2
Device deselected, I
OUT
=0mA,
ZZ
≥
V
DD
-0.2V, f=Max, All Inputs
≤
V
IL
or
≥
V
IH
-
10
mA
Output Low Voltage
V
OL
I
OL
=1.0mA
-
0.4
V
Output High Voltage
V
OH
I
OH
=-1.0mA
2.0
-
V
Input Low Voltage
V
IL
-0.3
0.7
V
Input High Voltage
V
IH
1.7
V
DD
+
V
Output Load(A)
Dout
Z0=50
VL=V
DDQ
/2
* Capacitive Load consists of all components of
the test environment.
Fig. 1
30pF*
Output Load(B)
(for t
LZC
, t
LZOE
, t
HZOE
& t
HZC
)
Dout
1538
5pF*
+2.5V
1667
* Including Scope and Jig Capacitance
RL=50
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