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參數(shù)資料
| 型號： | KM718V949 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512Kx18-Bit No Turnaround SRAM(512Kx18位數(shù)據流無返回靜態(tài) RAM) |
| 中文描述： | 512Kx18位無轉機的SRAM（512Kx18位數(shù)據流無返回靜態(tài)內存） |
| 文件頁數(shù)： | 7/17頁 |
| 文件大小： | 276K |
| 代理商： | KM718V949 |
PRELIMINARY
KM736V849
KM718V949
256Kx36 & 512Kx18 Pipelined N
t
RAM
TM
- 7 -
Rev 0.1
Aug. 1998
SYNCHRONOUS TRUTH TABLE
NOTE
: 1. X means "Don
′
t Care". 2. The rising edge of clock is symbolized by (
↑
).
3. A continue deselect cycle can only be enterd if a deselect cycle is executed first.
4. WRITE = L means Write operation in WRITE TRUTH TABLE.
WRITE = H means Read operation in WRITE TRUTH TABLE.
5. Operation finally depends on status of asynchronous input pins(ZZ and OE).
CS
1
CS
2
CS
2
ADV
WE
BWx
OE
CKE
CLK
Address Accessed
Operation
H
X
X
L
X
X
X
L
↑
↑
↑
↑
↑
↑
↑
↑
↑
N/A
Not Selected
X
L
X
L
X
X
X
L
N/A
Not Selected
X
X
H
L
X
X
X
L
N/A
Not Selected
X
X
X
H
X
X
X
L
N/A
Not Selected Continue
L
H
L
L
H
X
L
L
External Address
Begin Burst Read Cycle
X
X
X
H
X
X
L
L
Next Address
Continue Burst Read Cycle
L
H
L
L
H
X
H
L
External Address
NOP/Dummy Read
X
X
X
H
X
X
H
L
Next Address
Dummy Read
L
H
L
L
L
L
X
L
External Address
Begin Burst Write Cycle
X
X
X
H
X
L
X
L
↑
↑
↑
↑
Next Address
Continue Burst Write Cycle
L
H
L
L
L
H
X
L
N/A
NOP/Write Abort
X
X
X
H
X
H
X
L
Next Address
Write Abort
X
X
X
X
X
X
X
H
Current Address
Ignore Clock
WRITE TRUTH TABLE
(x36)
WE
BWa
BWb
BWc
BWd
Operation
H
X
X
X
X
READ
L
L
H
H
H
WRITE BYTE a
L
H
L
H
H
WRITE BYTE b
L
H
H
L
H
WRITE BYTE c
L
H
H
H
L
WRITE BYTE d
L
L
L
L
L
WRITE ALL BYTEs
L
H
H
H
H
WRITE ABORT/NOP
TRUTH TABLES
WRITE TRUTH TABLE
(x18)
NOTE
: 1. X means "Don
′
t Care".
2. All inputs in this table must meet setup and hold time around the rising edge of CLK(
↑
).
WE
BWa
BWb
Operation
H
X
X
READ
L
L
H
WRITE BYTE a
L
H
L
WRITE BYTE b
L
L
L
WRITE ALL BYTEs
L
H
H
WRITE ABORT/NOP
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