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參數(shù)資料
| 型號： | KM44C4003C |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 4M x 4Bit CMOS Quad CAS DRAM with Fast Page Mode(4M x 4位CMOS四CAS 動態(tài)RAM(帶快速頁模式)) |
| 中文描述： | 4米× 4位的CMOS DRAM與四中科院快速頁面模式（4米× 4位的CMOS四中科院動態(tài)隨機存儲器（帶快速頁模式）） |
| 文件頁數(shù)： | 1/20頁 |
| 文件大?。?/td> | 360K |
| 代理商： | KM44C4003C |
CMOS DRAM
KM44C4003C, KM44C4103C
This is a family of 4,194,304 x 4 bit Quad CAS with Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access
of memory cells within the same row. Refresh cycle (2K Ref. or 4K Ref.), access time (-5 or -6), power consumption(Normal or Low
power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only
refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. Four separate CAS pins provide for
seperate I/O operation allowing this device to operate in parity mode.
This 4Mx4 Fast Page Mode Quad CAS DRAM family is fabricated using Samsung
′
s advanced CMOS process to realize high band-
width, low power consumption and high reliability.
Part Identification
- KM44C4003C/C-L (5V, 4K Ref.)
- KM44C4103C/C-L (5V, 2K Ref.)
Fast Page Mode operation
Four seperate CAS pins provide for separate I/O operation
CAS-before-RAS refresh capability
RAS-only and Hidden refresh capability
Self-refresh capability (L-ver only)
Fast paralleltest mode capability
TTL compatible inputs and outputs
Early Write or output enable controlled write
JEDEC Standard pinout
Available in Plastic SOJ and TSOP(II) packages
Single +5V
±
10% power supply
Control
Clocks
RAS
CAS0 - 3
W
Vcc
Vss
DQ0
to
DQ3
A0-A11
(A0 - A10)
*1
A0 - A9
(A0 - A10)
*1
Memory Array
4,194,304 x 4
Cells
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
4M x 4Bit CMOS Quad CAS DRAM with Fast Page Mode
DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Refresh Cycles
Part
NO.
Refresh
cycle
Refresh period
Normal
64ms
32ms
L-ver
C4003C
C4103C
4K
2K
128ms
Performance Range
t
RAC
-5
50ns
-6
60ns
Speed
t
CAC
13ns
15ns
t
RC
90ns
110ns
t
PC
35ns
40ns
Remark
5V/3.3V
5V/3.3V
Active Power Dissipation
Speed
Refresh Cycle
4K
495
440
2K
605
550
-5
-6
Unit : mW
S
Data out
Buffer
Data in
Buffer
OE
Note)
*1
: 2K Refresh
Col. Address Buffer
Row Address Buffer
Refresh Counter
Refresh Control
Refresh Timer
Column Decoder
Row Decoder
VBB Generator
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| KM44C4003CS-6 | 制造商:Samsung Semiconductor 功能描述:DRAM Chip FPM 16M-Bit 4Mx4 5V 28-Pin TSOP-II |
| KM44C4004CS6 | 制造商:SAMSUNG 功能描述:* |
| KM44C4005C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 4Bit CMOS Quad CAS DRAM with Extended Data Out |
| KM44C4100C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 4Bit CMOS Dynamic RAM with Fast Page Mode |
| KM44C4103C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:4M x 4Bit CMOS Quad CAS DRAM with Fast Page Mode |
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