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參數(shù)資料
| 型號(hào)： | KESRX05 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | 260 to 470MHz ASK Receiver with Power Down |
| 中文描述： | 260至470MHz ASK接收機(jī)的斷電 |
| 文件頁數(shù)： | 9/28頁 |
| 文件大?。?/td> | 466K |
| 代理商： | KESRX05 |
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8
KESRX05
AC Electrical Characteristics (2)
These characteristics are typical values measured for a limited sample size. They are not guaranteed by production test.
They are only given as a guide to assist in the design-in phase of KESRX05 (refer to Note 11)
All characteristics measured at
T
AMB
= 25
°
C and V
CC
= 5V unless otherwise stated.
Value
Characteristic
f
S
= 434MHz
f
S
= 315MHz
f
S
= 434MHz
f
S
= 315MHz
f
S
= 434MHz, matched 50
environment
input and output
f
S
= 434MHz
Input referred, f
S
= 434MHz, matched 50
environment input and output
f
S
= 434MHz, output matched to mixer
input impedance
f
S
= 434MHz
f
S
= 315MHz
f
S
= 10·7MHz
f
S
= 434MHz, matched 50
environment input and output
f
S
= 434MHz,f
S
= 434MHz, measured at
input to ceramic filter. Include 6dB matching
loss
f
S
= 10·7MHz
All (Figures 14 and 15)
Conditions
Symbol
RF
IN
RF
OUT
NF
RF
IN
RF
IN
RF
AMP
MIXIP
IF1
NF
A
MIX
IF
IN
A
LOG
Internal RF Amplifier
Parallel input impedance
Parallel output impedance
Noise figure
Noise matching impedance
1dB compression point
Amplifier gain
Mixer
Parallel input impedance
Output impedance
Noise figure (double
sideband measurement
Mixer conversion gain
IF Strip (RSSI)
IF input impedance
IF gain of log amp
Typ.
Max.
Min.
Units
k
//pF
k
//pF
k
//pF
k
//pF
dB
k
//nH
dBm
dB
k
//pF
k
//pF
dB
dB
k
dB
2·8//1·8
1·78//1·7
10//1·1
18//1·1
4·5
1·0//4·6
2
20
13
1·6//1·8
1·6//1·8
300
10
9
3·1
80
NOTES
1. The Sensitivity of the test fixture is degraded by loading the input to RF amplifier with 50
, lack of image rejection and increasing the data filter
bandwidth from 5 to 50kHz Sensitivity is defined as the average signal level measured at the input necessary to achieve a bit error ratio of 0·01
where the input signal is a return to zero pulse at 470MHz,with an average duty cycle of 50%, 20kb/s data rate with the receiver bandwidth set to
470kHz.
2. Peak RF input level, pin RFIN, to overload the demodulator with the AGC operating. Equivalent to
1
7dBm for 50
input impedance, Where the
input signal is a return to zero pulse at 470MHz with an average duty cycle of 50% and 20kB/s data rate with the receiver bandwidth set to 470kHz.
3. Sensitivity is defined as the average signal level measured at the input necessary to achieve a bit error ratio of 0·01 where the input signal is a
return to zero pulse with an average duty cycle of 50%, 2kb/s data rate. Equivalent to
2
103dBm for 50
input impedance. Does not include
insertion loss of SAW filter at RF input but does include IF filter of 470kHz 3dB bandwidth and a data filter bandwidth of 5kHz. The results shown
in Figure 20 and in the AC Electrical Characteristics (1) on page 7 are with the simple LC circuit L5//C7 tuned correctly to 10·7MHz.
4. The performance of the power down option PD1 to PD2 cannot be guaranteed below 3V for temperatures less than 0
°
C. However, the time to
good data of PD0 to PD2 can be improved by connecting a 200k
in parallel wth C14 (see Table 1, pin 23).
5. Time taken for PLL lock voltage to achieve 90% transition point of the control signal and the VCO frequency to achieve within 470kHz of the final
frequency. The time taken to acquire PLL acquisition is governed by the PLL loop filter (C12, C1 and R2) and the crystal oscillator components
(XTAL1, C13 and C14). The dominant term for PLL aquistion is the start-up time of the crystal oscillator circuit, provided the PLL loop filter settling
time is much less than the crystal oscillator start-up time. Figure 7 illustrates a suitable test setup for measuring the acquisition time of the PLL and
the results are shown in Figure 18. The electrical characterisation parameters are based on the following sets of conditions:
Crystal oscillator circuit
Ident
Value
C13 = C14
15pF
XTAL1
6·6128MHz
ESR
15·3
L
85·36mH
C0
1·83pF
C1
6·8pF
The performance of the crystal oscillator can be improve by increasing the value of ESR (100
max.) or bt maintaining the crystaloscillator in PD0
mode by connecting a 200k
resistor in parallel with C14 (see Table 1, pin 23). The typical time to valid data of the receiver at a data rate of 2kb/s
is shown in Figure 17, which is accurate to
6
250
μ
s since the duration of the SPACE at 2kb/s = 250
μ
s.
6. Local oscillator power fed back into 50
source at antenna input (RF input). Measured with RF input matching network shown in Figures 25 and 26.
PLL loop filter
Ident
C12
C1
R1
Value
1·5nF
180pF
10k
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| KESRX05B1S | 260 to 470MHz ASK Receiver with Power Down |
| KESRX05B1T | 260 to 470MHz ASK Receiver with Power Down |
| KESRX05KG1S | 260 to 470MHz ASK Receiver with Power Down |
| KESRX05KG1T | 260 to 470MHz ASK Receiver with Power Down |
| KESRX05QP1S | 260 to 470MHz ASK Receiver with Power Down |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KESRX05B1S | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:260 to 470MHz ASK Receiver with Power Down |
| KESRX05B1T | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:260 to 470MHz ASK Receiver with Power Down |
| KESRX05KG1S | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:260 to 470MHz ASK Receiver with Power Down |
| KESRX05KG1T | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:260 to 470MHz ASK Receiver with Power Down |
| KESRX05QP1S | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:260 to 470MHz ASK Receiver with Power Down |
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