參數(shù)資料
型號(hào): KA2511B
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
中文描述: 偏轉(zhuǎn)處理器多同步監(jiān)測(cè)儀
文件頁(yè)數(shù): 14/35頁(yè)
文件大?。?/td> 337K
代理商: KA2511B
DEFLECTION PROCESSOR FOR MULTISYNC MONITORS KB2511B
13
Vertical C-Corr amplitude
XOXXXXXX inhibits C-corr
Ccorr
Sub address 08
V/Vpp at TV/2
Byte X1000000
Byte X1100000
Byte X1111111
-3
0
3
%
%
%
EAST/WEST FUNCTION
DC output voltage with typ Vpos, keystone,
corner and corner balance inhibited
EW
DC
pin 24,
see figure 2
2.5
V
DC output voltage thermal drift
TDEW
DC
see note 7
100
ppm/
C
Parabola amplitude with Vamp Max.
V-Pos typ, keystone ilhibited
EWpara
Sub address 0A
Byte 1111111
Byte 1010000
Byte 1000000
2.5
1.25
0
V
V
V
Parabola amplitude function of V-AMP control
(tracking between V-AMP and E/W) with typ Vpos
ketstone, EW Typ amplitude
(8)
EWtrack
Sub address 05
Byte 1000000
Byte 1100000
Byte 1111111
0.45
0.8
1.25
V
V
V
Keystone adjustment capability with typ Vpos,
EW typ amplitude and vertical amplitude max,
(8)
A/B Ratio(see figure 2)
B/A Ratio
KeyAdj
Sub address 09
Byte 1x000000
Byte 1x111111
1
1
Vpp
Vpp
Intrinsic keystone function of V-POS control
(tracking between V-pos and EW) Max amplitude
and vertical amplitude max.
(10)
A/B Ratio
B/A Ratio
Key-
Track
Sub address 09
Byte x0000000
Byte x1111111
0.52
0.52
INTERNAL HORIZONTAL DYNAMIC PHASE CONTROL FUNCTION
Side pin balance parabola amplitude (figure3) with
Vamp max, V-POS typ and parallelogram inhibited
(8,9)
SPBpara
Sub address 0D
Byte x1111111
Byte x0000000
+1.4
-1.4
%TH
%TH
Side pin balance parabola amplitude function of
Vamp control (tracking between Vamp and SPB)
with SPB max, V-POS typ and parallelogram
inhibited
(8,9)
SPBtrack
Sub address 05
Byte 10000000
Byte 11000000
Byte 11111111
0.5
0.9
1.4
%TH
%TH
%TH
Parallelogram adjustment capability with Vamp
max, V-POS typ and SPB max
(8,9)
A/B Ratio
B/A Ratio
ParAdj
Sub address 0E
Byte x1111111
Byte x1000000
+1.4
-1.4
%TH
%TH
Intrinsic parallelogram function of Vpos control
(tracking between V-pos and DHPC) with Vamp
max, SPB max and parallelogram inhibited
(8, 9)
A/B Ratio
B/A Ratio
Partrack
Sub address 06
Byte x0000000
Byte x1111111
0.52
0.52
Table 10. Vertical Section Electrical Characteristics (Continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
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