
K9S3208V0A-SSB0
SmartMedia
TM
23
Figure 8. Block Erase Operation
BLOCK ERASE
The Erase operation can erase on a block(8K Byte) basis. Block address loading is accomplished in two cycles initiated by an Erase
Setup command(60H). Only address A
13
to A
21
is valid while A
9
to A
12
is ignored. The addresses of the block to be erased to FFH.
The Erase Confirm command(D0h) following the block address loading initiates the internal erasing process. This two-step sequence
of setup followed by execution ensures that memory contents are not accidentally erased due to external noise conditions.
At the rising edge of WE after the erase confirm command input, the internal write controller handles erase, erase-verify and pulse
repetition where required. If an erase operation error is detected, the internal verify is halted and erase operation is terminated. When
the erase operation is completed, the Write Status Bit(I/O
0
) may be checked.
Figure 8 details the sequence.
60h
Block Add. : A
9
~ A
21
I/O
0
~
7
R/B
Address Input(2Cycle)
I/O
0
Pass
D0h
70h
Fail
t
BERS
READ STATUS
The device contains a Status Register which may be read to find out whether program or erase operation is complete, and whether
the program or erase operation completed successfully. After writing 70h command to the command register, a read cycle outputs
the contents of the Status Register to the I/O pins on the falling edge of CE or RE, whichever occurs last. This two line control allows
the system to poll the progress of each device in multiple memory connections even when R/B pins are common-wired. RE or CE
does not need to be toggled for updated status. Refer to table 2 for specific Status Register definitions. The command register
remains in Status Read mode until further commands are issued to it. Therefore, if the status register is read during a random read
cycle, a read command(00h or 50h) should be given before sequential page read cycle.
I/O #
Status
Definition
I/O
0
Program / Erase
"0" : Successful Program / Erase
"1" : Error in Program / Erase
I/O
1
Reserved for Future
Use
"0"
I/O
2
"0"
I/O
3
"0"
I/O
4
"0"
I/O
5
"0"
I/O
6
Device Operation
"0" : Busy "1" : Ready
I/O
7
Write Protect
"0" : Protected "1" : Not Protected
Table2. Read Status Register Definition