參數(shù)資料
型號(hào)： K9E2G08U0M-YIB00
元件分類(lèi)： PROM
英文描述： 256M X 8 FLASH 2.7V PROM, 30 ns, PDSO48
封裝： 12 X 20 MM, 0.50 MM PITCH, PLASTIC, TSOP1-48
文件頁(yè)數(shù)： 37/38頁(yè)
文件大?。?/td> 888K
代理商： K9E2G08U0M-YIB00
FLASH MEMORY
8
K9E2G08U0M
Preliminary
The device is arranged in eight 256Mbit memory planes. Each plane contains 2,048 blocks and 528 byte page registers. This allows
it to perform simultaneous page program and block erase by selecting one page or block from each plane. The block address map is
configured so that multi-plane program/erase operations can be executed for every four sequential blocks by dividing the memory
array into plane 0~3 or plane 4~7 separately. For example, multi-plane program/erase operations into plane 2,3,4 and 5 are prohib-
ited.
Memory Map
Figure 3. Memory Array Map
Plane 0
Plane 1
Plane 2
Plane 3
(2048 Block)
Page 0
Page 1
Page 31
Page 30
Block 0
Page 0
Page 1
Page 31
Page 30
Block 1
Page 0
Page 1
Page 31
Page 30
Block 2
Page 0
Page 1
Page 31
Page 30
Block 3
Page 0
Page 1
Page 31
Page 30
Block 8188
Page 0
Page 1
Page 31
Page 30
Block 8189
Page 0
Page 1
Page 31
Page 30
Block 8190
Page 0
Page 1
Page 31
Page 30
Block 8191
Page 0
Page 1
Page 31
Page 30
Block 8192
Page 0
Page 1
Page 31
Page 30
Block 8193
Page 0
Page 1
Page 31
Page 30
Block 8194
Page 0
Page 1
Page 31
Page 30
Block 8195
Page 0
Page 1
Page 31
Page 30
Block 16380
Page 0
Page 1
Page 31
Page 30
Block 16381
Page 0
Page 1
Page 31
Page 30
Block 16382
Page 0
Page 1
Page 31
Page 30
Block 16383
528byte Page Registers
Plane 4
Plane 5
Plane 6
Plane 7
(2048 Block)
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