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參數(shù)資料
| 型號(hào)： | K4H510438M-TLA2 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Dual Wide Bandwidth High Output Drive Single Supply Op Amp 8-PDIP 0 to 70 |
| 中文描述： | 128MB DDR SDRAM的 |
| 文件頁數(shù)： | 23/24頁 |
| 文件大?。?/td> | 367K |
| 代理商： | K4H510438M-TLA2 |
Rev. 1.1 June. 2005
DDR SDRAM
DDR SDRAM 512Mb C-die (x4, x8, x16)
Figure 4. I/V characteristics for input/output buffers:Pull up(above) and pull down(below)
Maximum
Typical High
Minumum
Typical Low
Vout(V)
I
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
0.0
1.0
2.0
I
Minimum
Typical Low
Typical High
Maximum
0
10
30
40
50
60
70
80
90
0.0
1.0
2.0
I
Vout(V)
Pullup Characteristics for Weak Output Driver
Pulldown Characteristics for Weak Output Driver
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K4H510438M-TLB0 | Dual Wide Bandwidth High Output Drive Single Supply Op Amp 8-PDIP 0 to 70 |
| K4H511638C-TCA0 | 8-Bit, 22 kSPS ADC Serial Out, uProcessor Periph./Standalone, Mux option w/SE or differential, 2 Ch. 8-SOIC |
| K4H511638C-TCA2 | 8-Bit, 22 kSPS ADC Serial Out, uProcessor Periph./Standalone, Mux option w/SE or differential, 2 Ch. 8-SOIC |
| K4H511638C-TCB0 | 8-Bit, 22 kSPS ADC Serial Out, uProcessor Periph./Standalone, Mux option w/SE or differential, 2 Ch. 8-SOIC |
| K4H511638C-TLA0 | 8-Bit, 22 kSPS ADC Serial Out, uProcessor Periph./Standalone, Mux option w/SE or differential, 2 Ch. 8-PDIP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4H510438M-TLB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb DDR SDRAM |
| K4H510638E-TC/LA2 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:Stacked 512Mb E-die DDR SDRAM Specification (x4/x8) |
| K4H510638E-TC/LAA | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:Stacked 512Mb E-die DDR SDRAM Specification (x4/x8) |
| K4H510638E-TC/LB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:Stacked 512Mb E-die DDR SDRAM Specification (x4/x8) |
| K4H510738E | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:Stacked 512Mb E-die DDR SDRAM Specification (x4/x8) |
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