參數(shù)資料
型號(hào)： ISPPAC30-01PI
廠商： LATTICE SEMICONDUCTOR CORP
元件分類(lèi)： 模擬信號(hào)調(diào)理
英文描述： In-System Programmable Analog Circuit
中文描述： SPECIALTY ANALOG CIRCUIT, PDIP28
封裝： PLASTIC, DIP-28
文件頁(yè)數(shù)： 13/30頁(yè)
文件大小： 379K
代理商： ISPPAC30-01PI
Lattice Semiconductor
ispPAC30 Preliminary Data Sheet
13
Theory of Operation
General Description
The ispPAC30 provides programmable, multiple single-ended or differential signal inputs, precision gain, offset
adjustment,
fi
ltering, and comparison functionality all in a single device. It also has complete routability of inputs or
outputs to any input cell and then to either summing node of the internal output ampli
fi
ers. A key feature of the
ispPAC30 is its capability of being recon
fi
gured in real time, apart from the operation of its non-volatile E
2
CMOS or
E
2
con
fi
guration memory. This enables the user to change or recon
fi
gure the ispPAC30 an unlimited number of
times, such as in an automatic gain control circuit or other applications requiring ongoing parametric or routing
changes. Because a user chosen con
fi
guration is always stored in non-volatile E
2
con
fi
guration memory as well,
there is a preset con
fi
guration ready to go when the device is
fi
rst turned on, or whenever a return to that stored
state is required. Of course, the E
2
con
fi
guration can be updated at any time during normal device operation as a
completely transparent background operation. All of this functionality and
fl
exibility is combined into the ispPAC30
as a single integrated circuit that greatly simpli
fi
es the otherwise burdensome task of designing and customizing
circuitry for a wide variety of analog applications.
The following sections of this data sheet give the user a thorough understanding of the general operation and
design considerations necessary when using the ispPAC30. Another resource that cannot be overlooked for under-
standing the ispPAC30 is associated with the PAC-Designer software design tool. Everything that can be con
fi
g-
ured is accessible in a schematic entry based format. A complete appreciation of the ispPAC30’s capabilities is
enhanced by exploring and using this design software early to learn more about it. Because a simulator is included,
the user can quickly test and prove operational modes and arrive at an understanding sooner while exploring
device capabilities. Complete documentation of PAC-Designer is included with the software.
Further technical insight into the ispPAC30 can be gained by referring to the many application notes and circuit
solutions that directly relate to this device. All ispPAC technical support literature is available from the Lattice Semi-
conductor web site at www.latticesemi.com. In addition, Lattice provides expert applications support for all ispPAC
devices and their usage.
Device Input Cells
In an ispPAC30 device, any input pin can be routed to any of the four input instrument ampli
fi
ers (IA), two of which
have dual input multiplexers, or to either of the two multiplying DAC’s (MDAC), or any combination of these. In addi-
tion, either output ampli
fi
er (OA) can be routed to any or all of these same input cells. This enables great
fl
exibility
in how an ispPAC30 is con
fi
gured and allows many functions to be performed, such as signal summation, cas-
caded gain blocks, complex feedback circuits, etc.
At the ispPAC30 input pins, the input signal range that can be directly applied is 0 to 2.8V. When used differentially,
the input pins can be of any polarity with respect to each other as long as the resultant signal is not expected to
drive the OA outputs below 0V. Normally, input signals will be single ended, in which case the
minus input pin
(V
IN-
)
can be tied to ground. Even with single ended measurements, the ispPAC30’s differential architecture can be used
to an advantage as it will sense ground at the point where it is connected and will also reject any noise common to
both ground and the input signal. Input impedances at all input nodes are the same as would be expected for MOS-
FET devices, and are typically in the Giga-Ohm range. Refer to the speci
fi
cations section for more detail.
Input Instrument Ampli
fi
ers
The input ampli
fi
ers (IA’s) are referred to as instrument ampli
fi
ers because they take the difference of the two input
pins and multiply it by the gain setting for which they have been con
fi
gured. With respect to true differential opera-
tion, this means that a negative gain setting is merely a reversal of the plus and minus input (V
IN
) pins. This is the
classical instrument ampli
fi
er function and also includes the previously mentioned bene
fi
t of remote sensing of sig-
nals (not necessarily 0V referenced) and rejection of common mode signals. Both IA’s and MDAC’s connected to
input signals also serve to buffer inputs by virtue of their very high input impedance.
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ISPPAC80-01SI 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
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