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參數資料
| 型號： | ISPPAC20-01J |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調理 |
| 英文描述： | In-System Programmable Analog Circuit |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數： | 26/32頁 |
| 文件大小： | 525K |
| 代理商： | ISPPAC20-01J |
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Specifications
ispPAC20
26
Software-Based Design Environment
Design Entry Software
Designers configure the ispPAC20 and verify its perfor-
mance using PAC-Designer, an easy to use, Microsoft
Windows compatible program. Circuit designs are en-
tered graphically and then verified, all within the
PAC-Designer environment. Full device programming is
supported using PC parallel port I/O operations and a
download cable connected to the serial programming
interface of the ispPAC20. A library of configurations is
included with basic solutions and examples of advanced
circuit techniques. In addition, comprehensive on-line
and printed documentation is provided that covers all
aspects of PAC-Designer operation.
The PAC-Designer schematic window, shown in Figure
14, provides access to all configurable ispPAC20 ele-
ments via its graphical user interface. All analog input
and output pins are represented. Static or non-config-
urable pins such as power, ground, VREF
OUT
, and the
serial digital interface are omitted for clarity. Any element
Figure 14. Initial PAC-Designer Schematic Design Entry Screen
in the schematic window can be accessed via mouse
operations as well as menu commands. When com-
pleted, configurations can be saved, simulated, and
downloaded to devices.
PAC-Designer operation can be automated and ex-
tended by using custom-designed Visual Basic
programs
that set the interconnections and the parameters of
ispPAC products. These stand-alone programs are called
macros. An example of such a macro is the biquad filter
generator supplied with PAC-Designer. With this macro,
filter parameters such as gain, Q and corner frequency
are input directly and then automatically converted to a
schematic configuration. More information on this and
other topics is included in the on-line documentation as
well as the PAC-Designer Getting Started Manual
PAC Designer - [Design1]
File Edit View Tools Options Window Help
Ready
OA1
IA2
1
IA1
1
1.07 pF
OA2
IA3
1
IA4
-1
1.07 pF
PolarityControl:PC pin
SRE=on
2.5V
2.5V
Hyst=on
XOR
Digitaloutputs=enabled
E2Cells/Parallel Inputs
UESBits =0000000
Code: 80h
0.0000V
IN1
IN2
IN3
OUT1
OUT2
CPIN
CP1OUT
CP2OUT
WINDOW
DACOUT
MSEL= A
PC = 0
3V
1.5V
3V
1.5V
PACblock1
PACblock2
CP1
CP2
a
b
-1
Direct
相關PDF資料 |
PDF描述 |
|---|---|
| ISPPAC20-01JI | In-System Programmable Analog Circuit |
| ISPPAC30 | In-System Programmable Analog Circuit |
| ISPPAC30-01P | In-System Programmable Analog Circuit |
| ISPPAC30-01PI | In-System Programmable Analog Circuit |
| ISPPAC30-01S | In-System Programmable Analog Circuit |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ISPPAC20-01JI | 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC20-01TI | 功能描述:SPLD - 簡單可編程邏輯器件 Not Upgrade Device CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC30 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Analog Circuit |
| ISPPAC30-01P | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Analog Circuit |
| ISPPAC30-01PI | 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
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