參數(shù)資料
型號(hào)： ISPPAC-CLK55xx
廠商： Lattice Semiconductor Corporation
英文描述： In-System Programmable Clock Generator with Universal Fan-Out Buffer
中文描述： 在系統(tǒng)可編程時(shí)鐘發(fā)生器與通用扇出緩沖器
文件頁數(shù)： 5/43頁
文件大?。?/td> 867K
代理商： ISPPAC-CLK55XX
Lattice Semiconductor
ispClock5500 Family Data Sheet
5
Performance Characteristics – Power Supply
DC Electrical Characteristics – Single-ended Logic
DC Electrical Characteristics – LVDS
Symbol
Parameter
Conditions
Typ.
Max.
Units
I
CCD
Core Supply Current
ispClock5510, f
VCO
= 640MHz
100
110
mA
ispClock5520, f
VCO
= 640MHz
130
150
mA
I
CCA
Analog Supply Current
f
VCO
V
CCO
V
CCO
V
CCO
V
CCO
V
CCJ
V
CCJ
V
CCJ
= 640MHz
5.5
7
mA
I
CCO
Output Driver Supply Current
(per Bank)
= 1.8V
= 2.5V
= 3.3V
= 3.3V
1
, LVCMOS
1
, LVCMOS
1
, LVCMOS
2
, LVDS
13
18
24
7.5
15
24
35
8
mA
I
CCJ
JTAG I/O Supply Current (static)
= 1.8V
= 2.5V
= 3.3V
200
300
300
300
400
400
μA
1. Supply current consumed by each bank, both outputs active, 18pF load, 320MHz output frequency.
2. Supply current consumed by each bank, 100
/5pF differential load, 320MHz output frequency.
Logic Standard
V
IL
(V)
V
IH
(V)
V
OL
Max. (V) V
OH
V
Min. (V)
I
OL
(mA)
I
OH
(mA)
Min.
Max.
Min.
Max.
LVTTL/LVCMOS 3.3V
-0.3
0.8
2
3.6
0.4
CCO
- 0.4
4
1
-4
1
LVCMOS 1.8V
-0.3
0.35V
CCO
0.65V
CCO
3.6
0.4
V
CCO
- 0.4
4
1
-4
1
LVCMOS 2.5V
-0.3
0.7
1.7
3.6
0.4
V
CCO
- 0.4
4
1
-4
1
SSTL2 Class 1
-0.3
V
REF
V
REF
V
REF
- 0.18 V
REF
V
REF
V
REF
+ 0.18
3.6
0.54
2
V
CCO
V
CCO
V
CCO
- 0.81
2
7.6
-7.6
SSTL3 Class 1
-0.3
- 0.2
+ 0.2
3.6
0.9
2
- 1.3
2
8
-8
HSTL Class 1
-0.3
- 0.1
+ 0.1
3.6
0.4
3
- 0.4
3
8
-8
1. Speci
fi
ed for 50
2. Speci
fi
ed for 40
3. Speci
fi
ed for
internal series output termination.
internal series output termination.
internal series output termination.
≈
20
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
V
ICM
Common Mode Input Voltage
0.05
—
2.35
V
V
THD
V
IN
V
OH
V
OL
V
OD
V
V
OS
V
OS
I
SA
I
SAB
Differential Input Threshold
±100
—
—
mV
Input Voltage
0
—
2.4
V
Output High Voltage
R
T
= 100
—
1.375
1.60
V
Output Low Voltage
R
T
= 100
0.9
1.03
—
V
Output Voltage Differential
R
T
= 100
250
400
480
mV
OD
Change in V
OD
between H and L
Output Voltage Offset
—
—
50
mV
Common Mode Output Voltage
1.125
1.20
1.375
V
Change in V
OS
Between H and L
Output Short Circuit Current
—
—
50
mV
V
OD
= 0V, Outputs Shorted to GND
V
OD
= 0V, Outputs Shorted to Each Other
—
—
24
mA
Output Short Circuit Current
—
—
12
mA
相關(guān)PDF資料
PDF描述
ISPPAC-CLK5510V In-System Programmable Clock Generator with Universal Fan-Out Buffer
ISPPAC-CLK5510V-01T48C In-System Programmable Clock Generator with Universal Fan-Out Buffer
ISPPAC-CLK5510V-01T48I In-System Programmable Clock Generator with Universal Fan-Out Buffer
ISPPAC-CLK5520V-01T100C LED Area Light; LED Color:Blue; Leaded Process Compatible:No; Light Emitting Area:62x62mm; Peak Reflow Compatible (260 C):No; Supply Current:200mA; Supply Voltage:24VDC; Wavelength:470nm
ISPPAC-CLK5520V-01T100I Linear Array Light; LED Color:Blue; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Supply Current:800mA; Supply Voltage:24VDC; Wavelength:470nm
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISPPACCLK5610AV-01T100C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer
ISPPACCLK5610AV-01T100I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer
ispPAC-CLK5610AV-01T48C 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 ISP 0 Delay Clock Ge n w/Unv Fan-Out Buf RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
ISPPACCLK5610AV-01T48C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer
ispPAC-CLK5610AV-01T48I 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 ISP 0 Dlay Clck Gen w/Unv Fan-Out Buf I RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
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