Specifications ispLSI 1024EA USE ispMA CH 4A5 FOR NEW 5V DESIGNS Output Load Conditions (see Figure 3) Switching Test Conditions TEST CONDITI" />
參數(shù)資料
型號: ISPLSI 1024EA-200LT100
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 9/13頁
文件大小: 0K
描述: IC PLD ISP 48I/O 10NS 100TQFP
標(biāo)準(zhǔn)包裝: 90
系列: ispLSI® 1000EA
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 4.5ns
電壓電源 - 內(nèi)部: 4.75 V ~ 5.25 V
邏輯元件/邏輯塊數(shù)目: 24
門數(shù): 4000
輸入/輸出數(shù): 48
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
包裝: 托盤
其它名稱: ISPLSI1024EA-200LT100
5
Specifications ispLSI 1024EA
USE
ispMA
CH
4A5
FOR
NEW
5V
DESIGNS
Output Load Conditions (see Figure 3)
Switching Test Conditions
TEST CONDITION
R1
R2
CL
A
470Ω
390Ω
35pF
B
390Ω
35pF
470Ω
390Ω
35pF
Active High
Active Low
C
470Ω
390Ω
5pF
390Ω
5pF
Active Low to Z
at V +0.5V
OL
Active High to Z
at V
-0.5V
OH
Table 2-0004/1024EA
Figure 3. Test Load
+ 5V
R1
R2
CL*
Device
Output
Test
Point
*CL includes Test Fixture and Probe Capacitance.
0213a
DC Electrical Characteristics
Over Recommended Operating Conditions
Input Pulse Levels
Table 2-0003/1024EA
Input Rise and Fall Time 10% to 90%
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
GND to 3.0V
1.5V
See Figure 3
3-state levels are measured 0.5V from
steady-state active level.
1.5ns
VOL
SYMBOL
1. One output at a time for a maximum duration of one second. VOUT = 0.5V was selected to avoid test
problems by tester ground degradation. Characterized but not 100% tested.
2. Measured using eight 16-bit counters.
3. Typical values are at VCC = 5V and TA = 25°C.
4. Unused inputs held at 0.0V.
5. Maximum ICC varies widely with specific device configuration and operating frequency. Refer to the
Power Consumption section of this data sheet and the Thermal Management section of the Lattice Semiconductor
Data Book CD-ROM to estimate maximum ICC.
Table 2-0007/1024EA
IIH
IIL
PARAMETER
IIL-PU
IOS1
ICC2,4,5
Output Low Voltage
Input or I/O Low Leakage Current
Operating Power Supply Current
IOL = 8 mA
0V ≤ VIN ≤ VIL (Max.)
VIL = 0.0V, VIH = 3.0V
CONDITION
MIN.
TYP.
3
MAX. UNITS
0.4
10
-10
10
V
VOH
Output High Voltage
IOH = -2 mA, VCCIO = 3.0V
IOH = -4 mA, VCCIO = 4.75V
2.4
V
2.4
V
μA
Input or I/O High Leakage Current
VCCIO ≤ VIN ≤ 5.25V
(VCCIO - 0.2)V ≤ VIN ≤ VCCIO
μA
I/O Active Pull-Up Current
0V ≤ VIN ≤ VIL
-200
μA
Output Short Circuit Current
VCCIO = 5.0V or 3.3V, VOUT = 0.5V
-240
mA
152
mA
fTOGGLE = 1 MHz
相關(guān)PDF資料
PDF描述
ISPLSI 1032-90LT IC PLD ISP 64I/O 12NS 100TQFP
ISPLSI 1032E-125LJN IC PLD ISP 64I/O 7.5NS 84PLCC
ISPLSI 1032EA-200LT100 IC PLD ISP 64I/O 4.5NS 100TQFP
ISPLSI 1048-50LQI IC PLD ISP 96I/O 18NS 120PQFP
ISPLSI 1048C-50LQI IC PLD ISP 96I/O 22NS 128PQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISPLSI1024EA-200LT100 功能描述:CPLD - 復(fù)雜可編程邏輯器件 RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
ISPLSI1032 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD
ISPLSI1032-50LJ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable Complex PLD
ISPLSI1032-60 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD
ISPLSI1032-60LG 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD