- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360999 > ISP1183BS (NXP SEMICONDUCTORS) Low-power Universal Serial Bus interface device with DMA PDF資料下載
參數(shù)資料
| 型號(hào)： | ISP1183BS |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | Low-power Universal Serial Bus interface device with DMA |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQCC32 |
| 封裝： | 5 X 5 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-617-1, HVQFN-32 |
| 文件頁(yè)數(shù)： | 10/62頁(yè) |
| 文件大?。?/td> | 295K |
| 代理商： | ISP1183BS |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)當(dāng)前第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)
Philips Semiconductors
ISP1183
Low-power USB interface device with DMA
Product data
Rev. 01 — 24 February 2004
10 of 62
9397 750 11804
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
[1]
Not driven LOW. There is, however, no current flow through the pads because no I/O supply voltage is
available. Therefore, no potential will develop at the output.
During the normal operation, when V
BUS
is available, pin SUSPEND is LOW. If there is no activity on
the USB bus for 3 ms or more, a suspend interrupt is generated on pin INT_N. On receiving the
suspend interrupt, the external processor issues a GOSUSP command to the device. Once the
GOSUSP command is issued by the processor, the device starts to prepare itself to go to the suspend
mode. During suspend, to reduce power consumption, the internal clocks can be shut down. Once the
device is completely ready to go into the suspend mode, it will assert pin SUSPEND HIGH and go into
the suspend mode. The typical time between the issuing of the GOSUSP command to the device and
the device asserting pin SUSPEND HIGH is approximately 2 ms.
Independent of the external reset. Depends only on the power-on reset.
On connecting the USB cable (V
BUS
), pin VBUSDET_N will change from HIGH level to LOW level in
approximately 2.5 ms to 3.5 ms.
[2]
[3]
[4]
8.11 Power supply
The ISP1183 is powered from a single supply voltage, ranging from 4.0 V to 5.5 V. An
integrated voltage regulator provides a 3.3 V supply voltage for the internal logic and
the USB transceiver. This voltage is available at pin V
REG(3V3)
for connecting an
external pull-up resistor on USB connection pin DP. See
Figure 3
.
The ISP1183 can also be operated from a 3.0 V to 3.6 V supply, as shown in
Figure 4
. In this case, the internal voltage regulator is disabled and pin V
REG(3V3)
must be connected to V
BUS
. For details, see
Section 19
.
8.12 Crystal oscillator
The ISP1183 has a crystal oscillator designed for a 6 MHz parallel-resonant crystal
(fundamental). A typical circuit is shown in
Figure 5
. Alternatively, an external clock
signal of 6 MHz can be applied to input XTAL1, while leaving output XTAL2 open.
SUSPEND
VBUSDET_N
DATA
H
H
Hi-Z
L
[1]
L
[1]
L
[1]
L
L
[3]
Hi-Z
L
H -> L
[4]
Hi-Z
L
L
-
Table 3:
Pin name
ISP1183 operation modes
…continued
Plug-out
state
Dead state
Reset state
Plug-in state
Normal state
Fig 3.
ISP1183 with a 4.0 V to 5.5 V supply.
Fig 4.
ISP1183 with a 3.0 V to 3.6 V supply.
VBUS
VREG(3V3)
VDD(I/O)
ISP1183
004aaa295
4.0 V to 5.5 V
VDD(I/O)
1.65 V to 3.6 V
VDD
8
12
18
30
21
3.0 V to 3.6 V
004aaa296
VBUS
VREG(3V3)
VDD(I/O)
VDD(I/O)
ISP1183
VDD
8
12
18
30
21
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。