FN8096.1 January 16, 2006 Functional Diagram Block Diagram I2C
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� ISL90842UIV1427Z-TK
寤犲晢锛� Intersil
鏂囦欢闋佹暩(sh霉)锛� 3/10闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC POT DGTL QUAD 50K OHM 14TSSOP
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Digitally Controlled Potentiometers
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 1
绯诲垪锛� XDCP™
鎺ョ墖锛� 256
闆婚樆锛堟瓙濮嗭級锛� 50k
闆昏矾鏁�(sh霉)锛� 4
婧害绯绘暩(sh霉)锛� 妯�(bi膩o)婧�(zh菙n)鍊� ±45 ppm/°C
瀛樺劜鍣ㄩ鍨嬶細 鏄撳け
鎺ュ彛锛� I²C锛堣ō(sh猫)鍌欎綅鍧€锛�
闆绘簮闆诲锛� 2.7 V ~ 5.5 V
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 14-TSSOP锛�0.173"锛�4.40mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 14-TSSOP
鍖呰锛� 妯�(bi膩o)婧�(zh菙n)鍖呰
鐢�(ch菐n)鍝佺洰閷勯爜闈細 1237 (CN2011-ZH PDF)
鍏跺畠鍚嶇ū锛� ISL90842UIV1427Z-TKDKR
2
FN8096.1
January 16, 2006
Functional Diagram
Block Diagram
I2C
INTERFACE
VCC
RH0
RH1
RH2
RH3
GND
RW0
RW1
RW2
RW3
SCL
SDA
A0
A1
RL
WR3
WR2
WR1
WR0
DCP3
DCP2
DCP1
DCP0
RH3
RW3
RH2
RW2
RH1
RW1
RH0
RW0
POWER-UP,
INTERFACE,
CONTROL
AND STATUS
LOGIC
I2C INTERFACE
SDA
SCL
A1
A0
GND
VCC
*
* THE RL PINS OF EACH DCP ARE LEFT FLOATING
Pin Descriptions
TSSOP PIN
SYMBOL
DESCRIPTION
1
RH3
鈥淗igh鈥� terminal of DCP3
2
RW3
鈥淲iper鈥� terminal of DCP3
3SCL
I2C interface clock
4
SDA
Serial data I/O for the I2C interface
5
GND
Device ground pin
6
RW2
鈥淲iper鈥� terminal of DCP2
7
RH2
鈥淗igh鈥� terminal of DCP2
8
RW1
鈥淲iper鈥� terminal of DCP1
9
RH1
鈥淗igh鈥� terminal of DCP1
10
A0
Device address for the I2C interface
11
A1
Device address for the I2C interface
12
VCC
Power supply pin
13
RH0
鈥淗igh鈥� terminal of DCP0
14
RW0
鈥淲iper鈥� terminal of DCP0
ISL90842
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
VE-B2X-MY-F1 CONVERTER MOD DC/DC 5.2V 50W
VE-B2W-MY-F4 CONVERTER MOD DC/DC 5.5V 50W
ISL90842WIV1427Z-TK IC POT DGTL QUAD 10K OHM 14TSSOP
VE-B2W-MY-F2 CONVERTER MOD DC/DC 5.5V 50W
VE-B2W-MY-F1 CONVERTER MOD DC/DC 5.5V 50W
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
ISL90842WIV1427 鍒堕€犲晢:INTERSIL 鍒堕€犲晢鍏ㄧū:Intersil Corporation 鍔熻兘鎻忚堪:Low Noise, Low Power, I2C Bus, 256 Taps
ISL90842WIV1427Z 鍔熻兘鎻忚堪:IC DCP 256-TAP 10KOHM TSSOP-14 RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 鏁�(sh霉)瀛楅浕浣嶅櫒 绯诲垪:XDCP™ 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:2,500 绯诲垪:- 鎺ョ墖:256 闆婚樆锛堟瓙濮嗭級:100k 闆昏矾鏁�(sh霉):2 婧害绯绘暩(sh霉):妯�(bi膩o)婧�(zh菙n)鍊� 35 ppm/°C 瀛樺劜鍣ㄩ鍨�:鏄撳け 鎺ュ彛:6 绶氫覆琛岋紙鑺墖閬告搰锛岄仦澧�锛屽/娓涳級 闆绘簮闆诲:2.6 V ~ 5.5 V 宸ヤ綔婧害:-40°C ~ 125°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:14-TSSOP锛�0.173"锛�4.40mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:14-TSSOP 鍖呰:甯跺嵎 (TR)
ISL90842WIV1427Z-TK 鍔熻兘鎻忚堪:IC POT DGTL QUAD 10K OHM 14TSSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 鏁�(sh霉)瀛楅浕浣嶅櫒 绯诲垪:XDCP™ 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- 鎺ョ墖:256 闆婚樆锛堟瓙濮嗭級:100k 闆昏矾鏁�(sh霉):1 婧害绯绘暩(sh霉):妯�(bi膩o)婧�(zh菙n)鍊� 35 ppm/°C 瀛樺劜鍣ㄩ鍨�:闈炴槗澶� 鎺ュ彛:3 绶氫覆鍙� 闆绘簮闆诲:2.7 V ~ 5.25 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:8-WDFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:8-TDFN-EP锛�3x3锛� 鍖呰:鍓垏甯� (CT) 鐢�(ch菐n)鍝佺洰閷勯爜闈�:1399 (CN2011-ZH PDF) 鍏跺畠鍚嶇ū:MAX5423ETA+TCT
ISL90843 鍒堕€犲晢:INTERSIL 鍒堕€犲晢鍏ㄧū:Intersil Corporation 鍔熻兘鎻忚堪:Quad Digital Controlled Potentiometers (XDCP鈶�)
ISL90843UIU1027Z 鍔熻兘鎻忚堪:IC XDCP 256-TAP 50OHM MSOP-10 RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 鏁�(sh霉)瀛楅浕浣嶅櫒 绯诲垪:XDCP™ 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:2,500 绯诲垪:- 鎺ョ墖:32 闆婚樆锛堟瓙濮嗭級:50k 闆昏矾鏁�(sh霉):1 婧害绯绘暩(sh霉):妯�(bi膩o)婧�(zh菙n)鍊� 50 ppm/°C 瀛樺劜鍣ㄩ鍨�:鏄撳け 鎺ュ彛:3 绶氫覆琛岋紙鑺墖閬告搰锛岄仦澧�锛屽/娓涳級 闆绘簮闆诲:2.7 V ~ 5.5 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:SOT-23-6 绱�(x矛)鍨嬶紝TSOT-23-6 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:TSOT-23-6 鍖呰:甯跺嵎 (TR)