參數(shù)資料
型號: ISL90842
廠商: Intersil Corporation
英文描述: Low Noise, Low Power, I2C Bus, 256 Taps
中文描述: 低噪聲,低功耗,I2C總線,256絲錐
文件頁數(shù): 2/12頁
文件大?。?/td> 1165K
代理商: ISL90842
2
FN8096.0
June 14, 2005
Block Diagram
R
H3
R
W3
WR3
DCP3
R
H2
R
W2
WR2
DCP2
R
H1
R
W1
WR1
DCP1
R
H0
R
W0
WR0
DCP0
POWER-UP,
INTERFACE,
CONTROL AND
STATUS LOGIC
I
2
C
INTERFACE
SDA
SCL
A1
A0
WP
GND
V
CC
X
*
*
The RL pins of each potentiometer are left floating
X
*
X
*
X
*
Pin Descriptions
TSSOP PIN
SYMBOL
DESCRIPTION
1
RH3
“High” terminal of DCP3
2
RW3
“Wiper” terminal of DCP3
3
SCL
I
2
C interface clock
4
SDA
Serial data I/O for the I
2
C interface
5
GND
Device ground pin
6
RW2
“Wiper” terminal of DCP2
7
RH2
“High” terminal of DCP2
8
RW1
“Wiper” terminal of DCP1
9
RH1
“High” terminal of DCP1
10
A0
Device address for the I
2
C interface
11
A1
Device address for the I
2
C interface
12
V
CC
Power supply pin
13
RH0
“High” terminal of DCP0
14
RW0
“Wiper” terminal of DCP0
ISL90842
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