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參數(shù)資料
| 型號(hào)： | ISL90728WIE627Z-TK |
| 廠商： | Intersil |
| 文件頁數(shù)： | 8/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC XDCP 128-TAP 10OHM SC70-6 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | XDCP™ |
| 接片： | 128 |
| 電阻（歐姆）： | 10k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 ±45 ppm/°C |
| 存儲(chǔ)器類型： | 易失 |
| 接口： | I²C |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 6-TSSOP，SC-88，SOT-363 |
| 供應(yīng)商設(shè)備封裝： | SC-70-6 |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 1237 (CN2011-ZH PDF) |
| 其它名稱： | ISL90728WIE627Z-TKDKR |
8
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8247.8
May 10, 2012
ISL90727, ISL90728
Small Outline Transistor Plastic Packages (SC70-6)
D
e1
E
C
L
e
b
C
L
A2
A
A1
C
L
0.20 (0.008) M
0.10 (0.004) C
C
-C-
SEATING
PLANE
12
3
4
5
6
E1
C
L
C
VIEW C
L
R1
R
4X
θ1
4X
θ1
GAUGE PLANE
L1
SEATING
α
L2
C
PLANE
c
BASE METAL
WITH
c1
b1
PLATING
b
PIN 1
INDEX AREA
8
P6.049
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
0.031
0.043
0.80
1.10
-
A1
0.000
0.004
0.00
0.10
-
A2
0.031
0.039
0.00
1.00
-
b
0.006
0.012
0.15
0.30
-
b1
0.006
0.010
0.15
0.25
c
0.003
0.009
0.08
0.22
6
c1
0.003
0.009
0.08
0.20
6
D
0.073
0.085
1.85
2.15
3
E
0.071
0.094
1.80
2.40
-
E1
0.045
0.053
1.15
1.35
3
e
0.0256 Ref
0.65 Ref
-
e1
0.0512 Ref
1.30 Ref
-
L
0.010
0.018
0.26
0.46
4
L1
0.017 Ref.
0.420 Ref.
L2
0.006 BSC
0.15 BSC
N
66
5
R
0.004
-
0.10
-
R1
0.004
0.010
0.15
0.25
α
0o
8o
0o
8o
-
Rev. 3 4/12
NOTES:
1. Dimensioning and tolerance per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC70 and JEDEC MO203AB.
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
7. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only.
8. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
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