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參數(shù)資料
| 型號(hào)： | ISL6722AAVZ |
| 廠商： | INTERSIL CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Flexible Single Ended Current Mode PWM Controllers |
| 中文描述： | 1 A SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | ROHS COMPLIANT, MO-153AB, PLASTIC, TSSOP-16 |
| 文件頁數(shù)： | 11/23頁 |
| 文件大小： | 428K |
| 代理商： | ISL6722AAVZ |
11
FN9237.0
October 19, 2005
The minimum amount of slope compensation required
corresponds to 1/2 the inductor downslope. However, adding
excessive slope compensation results in a control loop that
behaves more as a voltage mode controller than as current
mode controller.
The minimum amount of capacitance to place at the SLOPE
pin is:
where ton is the On time and Vslope is the amount of voltage
to be added as slope compensation to the current feedback
signal. In general, the amount of slope compensation added
is 2 to 3 times the minimum required.
Example:
Assume the inductor current signal presented at the ISENSE
pin decreases 125mV during the Off period, and:
Switching Frequency, Fsw = 250kHz
Duty Cycle, D = 60%
ton = D/Fsw = 0.6/250E3 = 2.4μs
toff = (1 - D)/Fsw = 1.6μs
Determine the downslope:
Downslope = 0.125V/1.6μs = 78mV/μs. Now determine the
amount of voltage that must be added to the current sense
signal by the end of the On time.
1
2
Therefore
The value calculated, 110pF, represents the minimum slope
compensation required. An appropriate slope compensation
capacitance for this example would be 1/2 to 1/3 the
calculated value, or between 68 and 33pF.
A more rigorous treatment of slope compensation can be
obtained from the small signal current-mode model [1]. It can
be shown that the naturally-sampled modulator gain, Fm,
without slope compensation, is
where Sn is the slope of the sawtooth signal and Tsw is the
switching frequency. When an external ramp is added, the
modulator gain becomes
where Se is slope of the external ramp and
The criteria for determining the correct amount of external
ramp can be determined by appropriately setting the
damping factor of the double-pole located at half the
oscillator frequency. The double-pole will be critically
damped if the Q-factor is set to 1, under-damped for Q > 1,
and over-damped for Q < 1. An under-damped condition
may result in current loop instability.
where D is the maximum duty cycle. Setting Q = 1 and
solving for Se yields
Since Sn and Se are the on time slopes of the current ramp
and the external ramp, respectively, they can be multiplied
by Ton to obtain the voltage change that occurs during Ton.
where Vn is the change in the current feedback signal during
the on time and Ve is the voltage that must be added by the
external ramp.
For buck-derived topologies, Vn can be solved for in terms of
output voltage, current transducer components, and output
inductance yielding
T
V
N
CT
L
O
N
P
where R
CS
is the current sense burden resistor, N
CT
is the
current transformer turns ratio, L
O
is the output inductance,
V
O
is the output voltage, and Ns and Np are the secondary
and primary turns, respectively.
TIME
I
Downslope
DOWNSLOPE
Current Sense Signal
CURRENT SENSE SIGNAL
FIGURE 5.
I
Cslope
4.24
6
–
×
10
--------------------
=
F
(EQ. 6)
Vslope
--
0.078
2.4
94mV
=
=
(EQ. 7)
Cslope min
)
4.24
6
–
×
10
------------10
6
–
110pF
≈
=
(EQ. 8)
Fm
-----------------------
=
(EQ. 9)
Fm
)
Tsw
----------+
c
---------------------------
=
=
(EQ. 10)
m
c
1
-------
+
=
(EQ. 11)
Q
c
D
)
0.5
–
)
----------------------–
=
(EQ. 12)
S
e
S
n
1
π
--
0.5
+
–
1
D
-------------
1
–
=
(EQ. 13)
V
e
V
n
1
π
--
0.5
+
–
1
D
-------------
1
–
=
(EQ. 14)
V
e
-----------------------------------------
N
S
-------
1
π
--
D
0.5
–
+
=
V
(EQ. 15)
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