參數(shù)資料
型號: ISL6551ABZ
廠商: INTERSIL CORP
元件分類: 穩(wěn)壓器
英文描述: 500-mA Peak Step-Up, Step-Down, Inverting Switching Voltage Regulator 14-PDIP -40 to 85
中文描述: DUAL SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO28
封裝: ROHS COMPLIANT, PLASTIC, MS-013AE, SOIC-28
文件頁數(shù): 18/26頁
文件大?。?/td> 619K
代理商: ISL6551ABZ
18
FN9066.4
July 8, 2005
Current Sense
Two-Leg Sense -
Senses the current that flows through both
lower primary FETs. Operates at the switching frequency.
Top Sense -
Senses the sum of the current that flows through
both upper primary FETs. Operates at the clock frequency.
Resistor Sense -
This simple scheme is used in a primary side
control system. The sum of the current that flows through both
lower primary FETs is sensed with a low impedance power
resistor. The sources of Q3 and Q4 and ISENSE should be tied
at the same point as close as possible.
BIASES
Linear Regulator -
In a primary side control system, a
linear regulator derived from the input line can be used for
the start-up purpose, and an extra winding coupled with the
main transformer can provide the controller power after the
start up.
DCM Flyback -
Use a PWM controller to develop both
primary and secondary biases with discontinuous current
mode flyback topology.
Primary FETs
Full Bridge -
Four MOSFETs are required for full bridge
converters. The drain to source voltage rating of the
MOSFETs is Vin.
Push-Pull -
Only the two lower MOSFETs are required for
push-pull converters. The two upper drivers are not used.
The V
DS
of the MOSFETs is 2xVin.
FIGURE 14A. TWO-LEG SENSE
FIGURE 14B. TOP SENSE
FIGURE 14C. RESISTOR SENSE (PRIMARY CONTROL)
ISENSE
T_CURRENT
Q3_S
Q4_S
ISENSE
V
IN
F
CURRENT_SEN_P
ISENSE
RSENSE
Q3_S & Q4_S
FIGURE 15A.
FULL BRIDGE
FIGURE 15B.
PUSH-PULL
Q3_G
P–
Q1_G
Q3_S
Q1
Q3
V
F
Q2_G
P+
Q4_G
Q2
Q4
Q4_S
or CURRENT_SEN_P
P1–
Q3_G
Q3_S
Q3
Q4_G
P2–
Q4_S
Q4
ISL6551
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