
6
FN9214.0
March 9, 2006
Absolute Maximum Ratings
Thermal Information
Input Voltage, VIN, VFF. . . . . . . . . . . . . . . . . . . . . . -0.3V to +22.0V
Driver Bias Voltage, PVCC . . . . . . . . . . . . . . . . . . . . -0.3V to +6.0V
Signal Bias Voltage, VCC . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.0V
Boot Voltage, V
BOOT
. . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +36V
Phase Voltage, V
PHASE
. . . . . . . . . . V
BOOT
- 6V to V
BOOT
+ 0.3V
Boot to Phase Voltage, V
BOOT
- V
PHASE
. . . . . . . . . . . . . . . . . . .6V
Other Input or Output Voltages . . . . . . . . . . . . . -0.3V to VCC +0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Class 2
Recommended Operating Conditions
Input Voltage, VIN, VFF. . . . . . . . . . . . . . . . . . . . 3.3V to 20V
±
10%
Driver Bias Voltage, PVCC . . . . . . . . . . . . . . . . . . . . . . 2.9V to 5.6V
Signal Bias Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . 2.9V to 5.6V
Boot to Phase Voltage (Overcharged), V
BOOT
- V
PHASE
. . . . . .<6V
Ambient Temperature Range. . . . . . . . . . . . . . . . . . . .-40°C to 85°C
Junction Temperature Range. . . . . . . . . . . . . . . . . . .-40°C to 125°C
Thermal Resistance (Note 1, 2)
QFN Package (Note 1, 2). . . . . . . . .
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150°C
Maximum Storage Temperature Range. . . . . . . . . . .-65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
θ
JA
(
°C
/W)
32
θ
JC
(
°C
/W)
5
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features.
2.
θ
JC
, "case temperature" location is at the center of the package underside exposed pad. See Tech Brief TB379 for details.
3. Test conditions identified as “GBD” are guaranteed by design simulation.
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Noted
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
INPUT SUPPLY CURRENTS
I
VCC
Nominal VCC Supply Current
VIN = VCC = PVCC = 5V, Fs = 600kHz,
UGATE and LGATE Open
-
8
-
mA
I
PVCC
Nominal PVCC Supply Current
VIN = VCC = PVCC = 5V; Fs = 600kHz,
UGATE and LGATE Open
-
5
-
mA
I
VIN
Nominal Vin Supply Current
VIN = VCC = PVCC = 5V; Fs = 600kHz,
UGATE and LGATE Open
-
1
-
mA
I
PVCC_S
Shutdown VCC Supply Current
EN = 0V, VCC = PVCC = VIN = 5V
-
7
-
mA
I
VCC_S
Shutdown PVCC Supply Current
EN = 0V, VCC = PVCC = VIN = 5V
-
1
-
mA
I
VIN_S
Shutdown VIN Supply Current
EN = 0V, VCC = PVCC = VIN = 5V
-
1
-
mA
POWER-ON RESET
POR
VCC_R
Rising VCC Threshold
-
-
2.90
V
POR
VCC_F
Falling VCC Threshold
2.58
-
-
V
POR
VCC_H
VCC Hysterisis
184
202
217
mV
POR
PVCC_R
Rising PVCC Threshold
-
-
2.90
V
POR
PVCC_F
Falling PVCC Threshold
2.58
-
-
V
POR
PVCC_H
PVCC Hysterisis
187
204
223
mV
POR
VFF_R
Rising VFF Threshold
-
-
1.54
V
POR
VFF_F
Falling VFF Threshold
1.35
-
-
V
POR
VFF_H
VFF Hysterisis
124
135
146
mV
ENABLE
V
EN_REF
Input Reference Voltage
0.480
0.496
0.512
V
I
EN_HYS
Hysteresis Source Current
7
10
15
μ
A
V
EN
Maximum Input Voltage
-
VCC+0.3
-
V
ISL6540