參數(shù)資料
型號(hào)： ISL6540IRZ
廠商： INTERSIL CORP
元件分類： 穩(wěn)壓器
英文描述： Single-Phase Buck PWM Controller with Integrated High Speed MOSFET Driver and Pre-Biased Load Capability
中文描述： SWITCHING CONTROLLER, 2000 kHz SWITCHING FREQ-MAX, PQCC28
封裝： 5 X 5 MM, ROHS COMPLIANT, PLASTIC, MO-220VHHD-1, QFN-28
文件頁(yè)數(shù)： 15/20頁(yè)
文件大?。?/td> 518K
代理商： ISL6540IRZ
15
FN9214.0
March 9, 2006
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to
another can generate voltage transients across the
impedances of the interconnecting bond wires and circuit
traces. These interconnecting impedances should be
minimized by using wide, short printed circuit traces. The
critical components should be located as close together as
possible using ground plane construction or single point
grounding.
Figure 7 shows the critical power components of the
converter. To minimize the voltage overshoot/undershoot
the interconnecting wires indicated by heavy lines should be
part of ground or power plane in a printed circuit board. The
components shown in Figure 8 should be located as close
together as possible. Please note that the capacitors C
IN
and C
O
each represent numerous physical capacitors.
Locate the ISL6540 within 3 inches of the MOSFETs, Q1
and Q2. The circuit traces for the MOSFETs’ gate and
source connections from the ISL6540 must be sized to
handle up to 4A peak current.
Proper grounding of the IC is important for correct operation
in noisy environments. The PGND pin should be connected
to board ground at the source of the low side MOSFET with
a wide short trace. The GND pin should be connected to a
large copper fill under the IC which is subsequently
connected to board ground at a quite location on the board,
typically found at an input or output bulk (electrolytic)
capacitor.
VSEN-
VSEN+
COMP
FB
VMON
R
FB
R
OS
Z
IN
Z
FB
OV/UV
COMP
ERROR AMP
C
SEN
800mV
VCC
V
SS
10
10
VOUT (LOCAL)
GND (LOCAL)
VSENSE+
(REMOTE)
GAIN=1
VSENSE-
(REMOTE)
FIGURE 6.
SIMPLIFIED UNITY GAIN DIFFERENITAL SENSING IMPLEMENTATION
PGND
L
O
C
O
LGATE
UGATE
PHASE
Q1
Q2
FIGURE 7. PRINTED CIRCUIT BOARD POWER AND
GROUND PLANES OR ISLANDS
V
IN
V
OUT
RETURN
ISL6540
C
IN
L
FIGURE 8. PRINTED CIRCUIT BOARD SMALL SIGNAL
LAYOUT GUIDELINES
+5V
ISL6540
SS
PGND
PVCC
BOOT
D1
L
O
C
O
V
OUT
L
Q1
Q2
PHASE
+V
IN
C
BOOT
C
PVCC
C
SS
GND
ISL6540
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