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參數(shù)資料
| 型號(hào)： | ISL6537 |
| 廠商： | Intersil Corporation |
| 英文描述： | PWM Control Circuit 16-SOIC -40 to 85 |
| 中文描述： | ACPI的穩(wěn)壓器/雙通道DDR內(nèi)存控制器系統(tǒng) |
| 文件頁(yè)數(shù)： | 14/15頁(yè) |
| 文件大小： | 560K |
| 代理商： | ISL6537 |
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14
FN9142.4
February 8, 2005
turns on. Place the small ceramic capacitors physically close
to the MOSFETs and between the drain of upper MOSFET
and the source of lower MOSFET.
The important parameters for the bulk input capacitance are
the voltage rating and the RMS current rating. For reliable
operation, select bulk capacitors with voltage and current
ratings above the maximum input voltage and largest RMS
current required by the circuit. Their voltage rating should be
at least 1.25 times greater than the maximum input voltage,
while a voltage rating of 1.5 times is a conservative
guideline. For most cases, the RMS current rating
requirement for the input capacitor of a buck regulator is
approximately 1/2 the DC load current.
The maximum RMS current required by the regulator may be
closely approximated through the following equation:
For a through hole design, several electrolytic capacitors
may be needed. For surface mount designs, solid tantalum
capacitors can be used, but caution must be exercised with
regard to the capacitor surge current rating. These
capacitors must be capable of handling the surge-current at
power-up. Some capacitor series available from reputable
manufacturers are surge current tested.
MOSFET Selection - PWM Buck Converter
The ISL6537 requires 2 N-Channel power MOSFETs for
switching power and a third MOSFET to block backfeed from
V
DDQ
to the Input in S3 Mode. These should be selected
based upon r
DS(ON)
, gate supply requirements, and thermal
management requirements.
In high-current applications, the MOSFET power dissipation,
package selection and heatsink are the dominant design
factors. The power dissipation includes two loss
components; conduction loss and switching loss. The
conduction losses are the largest component of power
dissipation for both the upper and the lower MOSFETs.
These losses are distributed between the two MOSFETs
according to duty factor. The switching losses seen when
sourcing current will be different from the switching losses
seen when sinking current. When sourcing current, the
upper MOSFET realizes most of the switching losses. The
lower switch realizes most of the switching losses when the
converter is sinking current (see the equations below).
These equations assume linear voltage-current transitions
and do not adequately model power loss due the reverse-
recovery of the upper and lower MOSFET’s body diode. The
gate-charge losses are dissipated in part by the ISL6537 and
do not significantly heat the MOSFETs. However, large gate-
charge increases the switching interval, t
SW
which increases
the MOSFET switching losses. Ensure that both MOSFETs
are within their maximum junction temperature at high
ambient temperature by calculating the temperature rise
according to package thermal-resistance specifications. A
separate heatsink may be necessary depending upon
MOSFET power, package type, ambient temperature and air
flow.
MOSFET Selection - LDO
The main criteria for selection of the linear regulator pass
transistor is package selection for efficient removal of heat.
Select a package and heatsink that maintains the junction
temperature below the rating with a maximum expected
ambient temperature.
The power dissipated in the linear regulator is:
where I
O
is the maximum output current and V
OUT
is the
nominal output voltage of the linear regulator.
I
RMSMAX
V
IN
-------------
I
OUTMAX
2
1
12
------
V
---------–
V
s
V
IN
-------------
×
2
×
+
×
=
P
LOWER
= Io
2
x r
DS(ON)
x (1 - D)
Where: D is the duty cycle = V
OUT
/ V
IN
,
t
SW
is the combined switch ON and OFF time, and
f
s
is the switching frequency.
Approximate Losses while Sourcing current
Io
2
r
DS ON
=
Approximate Losses while Sinking current
P
UPPER
= Io
2
x r
DS(ON)
x D
P
LOWER
Io
2
r
DS ON
)
×
1
D
–
(
)
×
1
2
--
Io
V
IN
×
t
SW
f
s
×
×
+
=
P
UPPER
)
×
D
×
1
2
--
Io
V
IN
×
t
SW
f
s
×
×
+
P
LINEAR
I
O
V
IN
V
OUT
–
(
)
×
ISL6537
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參數(shù)描述 |
|---|---|
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| ISL6537-6506EVAL1 | 制造商:Intersil Corporation 功能描述:ISL6537-6506 EVALUATION BOARD 1 - QFN - Bulk 制造商:Intersil Corporation 功能描述:BOARD EVAL FOR ISL6506 ISL6537 制造商:Intersil 功能描述:ISL6537-6506 EVAL BRD 1 |
| ISL6537A-6506EVAL1Z | 功能描述:EVALUATION BOARD ISL986A-6506 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - DC/DC 與 AC/DC（離線）SMPS 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:True Shutdown™ 主要目的:DC/DC，步升 輸出及類型:1，非隔離 功率 - 輸出:- 輸出電壓:- 電流 - 輸出:1A 輸入電壓:2.5 V ~ 5.5 V 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):升壓 頻率 - 開關(guān):3MHz 板類型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ISL6537ACR | 功能描述:IC REG/CTRLR ACPI DUAL DDR 28QFN RoHS:否 類別:集成電路 (IC) >> PMIC - 電源管理 - 專用 系列:- 應(yīng)用說(shuō)明:Ultrasound Imaging Systems Application Note 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:37 系列:- 應(yīng)用:醫(yī)療用超聲波成像，聲納 電流 - 電源:- 電源電壓:2.37 V ~ 6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:56-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-TQFN-EP（8x8） 包裝:管件 |
| ISL6537ACRR5160 | 制造商:Intersil Corporation 功能描述: |
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