- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383149 > ISL6504CBZ (INTERSIL CORP) Multiple Linear Power Controller with ACPI Control Interface PDF資料下載
參數(shù)資料
| 型號(hào)： | ISL6504CBZ |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | Multiple Linear Power Controller with ACPI Control Interface |
| 中文描述： | 4-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO16 |
| 封裝： | LEAD FREE, PLASTIC, MS-013-AA, SOIC-16 |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 409K |
| 代理商： | ISL6504CBZ |
12
FN9062.2
April 13, 2004
pins of the control IC, and connect them to ground through a
via placed close to the ground pad. Minimize any leakage
current paths from the SS node, as the internal current
source is only 10
μ
A (typical).
A multi-layer printed circuit board is recommended.
Figure 11 shows the connections to most of the components
in the circuit. Note that the individual capacitors shown each
could represent numerous physical capacitors. Dedicate one
solid layer for a ground plane and make all critical
component ground connections through vias placed as close
to the component terminal as possible. Dedicate another
solid layer as a power plane and break this plane into
smaller islands of common voltage levels. Ideally, the power
plane should support both the input power and output power
nodes. Use copper filled polygons on the top and bottom
circuit layers to create power islands connecting the filtering
components (output capacitors) and the loads. Use the
remaining printed circuit layers for small signal wiring.
Component Selection Guidelines
Output Capacitors Selection
The output capacitors should be selected to allow the output
voltage to meet the dynamic regulation requirements of
active state operation (S0, S1). The load transient for the
various microprocessor system’s components may require
high quality capacitors to supply the high slew rate (di/dt)
current demands. Thus, it is recommended that the output
capacitors be selected for transient load regulation, paying
attention to their parasitic components (ESR, ESL).
Also, during the transition between active and sleep states
on the 3.3V
DUAL
/3.3V
SB
and 5V
DUAL
outputs, there is a
short interval of time during which none of the power pass
elements are conducting - during this time the output
capacitors have to supply all the output current. The output
voltage drop during this brief period of time can be easily
approximated with the following formula:
×
=
, where
V
OUT
- output voltage drop
ESR
OUT
- output capacitor bank ESR
I
OUT
- output current during transition
C
OUT
- output capacitor bank capacitance
t
t
- active-to-sleep or sleep-to-active transition time (10
μ
s typ.)
The output voltage drop is heavily dependent on the ESR
(equivalent series resistance) of the output capacitor bank,
the choice of capacitors should be such as to maintain the
output voltage above the lowest allowable regulation level.
Input Capacitors Selection
The input capacitors for an ISL6504/A application must have
a sufficiently low ESR so as not to allow the input voltage to
dip excessively when energy is transferred to the output
capacitors. If the ATX supply does not meet the
specifications, certain imbalances between the ATX’s
outputs and the ISL6504/A’s regulation levels could have as
a result a brisk transfer of energy from the input capacitors to
the supplied outputs. At the transition between active and
sleep states, such phenomena could be responsible for the
5V
SB
voltage drooping excessively and affecting the output
regulation. The solution to such a potential problem is using
larger input capacitors with a lower total combined ESR.
Transistor Selection/Considerations
The ISL6504/A usually requires one P-Channel (or bipolar
PNP), two N-Channel MOSFETs, and one bipolar NPN
transistors.
One important criteria for selection of transistors for all the
linear regulators/switching elements is package selection for
efficient removal of heat. The power dissipated in a linear
regulator or an ON/OFF switching element is
Select a package and heatsink that maintains the junction
temperature below the rating with the maximum expected
ambient temperature.
L
VOUT1
CHF1
L
FIGURE 11. PRINTED CIRCUIT BOARD ISLANDS
VOUT3
Q1
Q2
Q3
CSS
+12VIN
+5VSB
CIN
VIA CONNECTION TO GROUND PLANE
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT/POWER PLANE LAYER
ISL6504/A
VOUT4
SS
GND
5VDLSB
3V3DLSB
KEY
5VSB
DLA
Q4
CBULK4
L
C5VSB
L
CHF3
CHF4
5VDL
+5VIN
+3.3VIN
3V3DL
3V3
1V5SB
CBULK2
CHF2
CBULK1
1V2VID
CBULK3
VOUT2
V
OUT
I
OUT
ESR
OUT
t
OUT
---------------
+
P
LINEAR
I
O
V
IN
V
OUT
–
(
)
×
=
ISL6504, ISL6504A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISL6504CBZ-T | Multiple Linear Power Controller with ACPI Control Interface |
| ISL6504 | Multiple Linear Power Controller with ACPI Control Interface |
| ISL6504A | Multiple Linear Power Controller with ACPI Control Interface |
| ISL6504ACB-T | JT 8C 8#20 SKT PLUG |
| ISL6504AEVAL1 | Multiple Linear Power Controller with ACPI Control Interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL6504CBZ-T | 功能描述:DC/DC 開關(guān)控制器 4-OUTPUT ACPI PWR CNTLR FOR BROOKDALE RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK |
| ISL6504CR | 功能描述:IC MULTIPLE POWER CTRLR 20-QFN RoHS:否 類別:集成電路 (IC) >> PMIC - 電源控制器，監(jiān)視器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 應(yīng)用:多相控制器 輸入電壓:- 電源電壓:9 V ~ 14 V 電流 - 電源:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（5x5） 包裝:帶卷 (TR) |
| ISL6504CR-T | 功能描述:IC MULTIPLE POWER CTRLR 20-QFN RoHS:否 類別:集成電路 (IC) >> PMIC - 電源控制器，監(jiān)視器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 應(yīng)用:多相控制器 輸入電壓:- 電源電壓:9 V ~ 14 V 電流 - 電源:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（5x5） 包裝:帶卷 (TR) |
| ISL6505 WAF | 制造商:Intersil Corporation 功能描述: |
| ISL6505C WAF | 制造商:Intersil Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。