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參數(shù)資料
| 型號： | ISL6504CBZ |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | Multiple Linear Power Controller with ACPI Control Interface |
| 中文描述： | 4-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO16 |
| 封裝： | LEAD FREE, PLASTIC, MS-013-AA, SOIC-16 |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 409K |
| 代理商： | ISL6504CBZ |
10
FN9062.2
April 13, 2004
During sleep-to-active state transitions from conditions
where the 5V
DUAL
output is initially 0V (such as S5 to S0
transition, or simple power-up sequence directly into active
state), the circuit goes through a quasi soft-start, the
5V
DUAL
output
being pulled high through the body diode of
the N-Channel MOSFET connected between it and the 5V
ATX. Figure 9 exemplifies this start-up case. 5V
SB
is already
present when the main ATX outputs are turned on, at time
T0. As a result of +5V
IN
ramping up, the 5V
DUAL
output
capacitors charge up through the body diode of Q4 (see
Typical Application). At time T1, all main ATX outputs
exceed the ISL6504/A’s undervoltage thresholds, and the
internal 25ms (typical) timer is initiated. At T2, the time-out
initiates a soft-start, and the 1.2V voltage ID output is
ramped-up, reaching regulation limits at time T3.
Simultaneous with the beginning of this ramp-up, at time T2,
the DLA pin is released, allowing the pull-up resistor to turn
on Q2 and Q4, and bring the 5V
DUAL
output in regulation.
Shortly after time T3, as the SS voltage reaches 2.75V, the
soft-start capacitor is quickly discharged down to
approximately 2.45V, where it remains until a valid sleep
state request is received from the system.
Fault Protection
All the outputs are monitored against undervoltage events. A
severe overcurrent caused by a failed load on any of the
outputs, would, in turn, cause that specific output to
suddenly drop. If any of the output voltages drops below
80% (typical) of their set value, such event is reported by
having the FAULT pin pulled to 5V. Additionally, exceeding
the maximum current rating of an integrated regulator
(output with pass regulator on chip) can lead to output
voltage drooping; if excessive, this droop can ultimately trip
the undervoltage detector and send a FAULT signal to the
computer system.
A FAULT condition occurring on an output when controlled
through an external pass transistor will only set off the
FAULT flag, and it will not shut off or latch off any part of the
circuit. A FAULT condition occurring on an output controlled
through an internal pass transistor, will set off the FAULT
flag, and it will shut off the respective faulting regulator only.
If shutdown or latch off of the entire circuit is desired in case
of a fault, regardless of the cause, this can be achieved by
externally pulling or latching the SS pin low. Pulling the SS
pin low will also force the FAULT pin to go low and reset any
internally latched-off output.
Special consideration is given to the initial start-up
sequence. If, following a 5V
SB
POR event, any of the
1.5V
SB
or 3.3V
DUAL
/3.3V
SB
outputs is ramped up and is
subject to an undervoltage event before the end of the
second soft-start ramp, then the FAULT output goes high
and the entire IC latches off. Latch-off condition can be reset
by cycling the bias power (5V
SB
). Undervoltage events on
the 1.5V
SB
and the 3.3V
DUAL
/3.3V
SB
outputs at any other
times are handled according to the description found in the
second paragraph under the current heading.
Another condition that could set off the FAULT flag is chip
overtemperature. If the ISL6504/A reaches an internal
temperature of 140
o
C (typical), the FAULT flag is set, but the
chip continues to operate until the temperature reaches
155
o
C (typical), when unconditional shutdown of all outputs
takes place. Operation resumes only after powering down
the IC (to create a 5V
SB
POR event) and a start-up
(assuming the cause of the fault has been removed; if not,
as it heats up again, it will repeat the FAULT cycle).
In ISL6504/A applications, loss of the active ATX output
(3.3V
IN
; as detected by the on-board voltage monitor) during
active state operation causes the chip to switch to S5 sleep
state, in addition to reporting the input UV condition on the
FAULT pin. Exiting from this forced S5 state can only be
achieved by returning the faulting input voltage above its UV
threshold, by resetting the chip through removal of 5V
SB
bias voltage, or by bringing the SS pin at a potential lower
than 0.8V.
Application Guidelines
Soft-Start Interval
The 5V
SB
output of a typical ATX supply is capable of
725mA, with newer models rated for 1.0A, and even 2.0A.
During power-up in a sleep state, the 5V
SB
ATX output
needs to provide sufficient current to charge up all the
applicable output capacitors and, simultaneously, provide
some amount of current to the output loads. Drawing
FIGURE 9. SOFT-START INTERVAL IN ACTIVE STATE
0V
0V
TIME
OUTPUT
VOLTAGES
(1V/DIV)
T1
T2
T3
T0
INPUT VOLTAGES
(2V/DIV)
+5VIN
+12VIN
+5VSB
VOUT1 (1.5VSB)
VOUT3 (3.3VDUAL/3.3VSB)
VOUT4 (5VDUAL)
DLA PIN
(2V/DIV)
+3.3VIN
VOUT2 (1.2VVID)
SOFT-START
(1V/DIV)
ISL6504, ISL6504A
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參數(shù)描述 |
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| ISL6504CBZ-T | 功能描述:DC/DC 開關(guān)控制器 4-OUTPUT ACPI PWR CNTLR FOR BROOKDALE RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK |
| ISL6504CR | 功能描述:IC MULTIPLE POWER CTRLR 20-QFN RoHS:否 類別:集成電路 (IC) >> PMIC - 電源控制器，監(jiān)視器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 應(yīng)用:多相控制器 輸入電壓:- 電源電壓:9 V ~ 14 V 電流 - 電源:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（5x5） 包裝:帶卷 (TR) |
| ISL6504CR-T | 功能描述:IC MULTIPLE POWER CTRLR 20-QFN RoHS:否 類別:集成電路 (IC) >> PMIC - 電源控制器，監(jiān)視器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 應(yīng)用:多相控制器 輸入電壓:- 電源電壓:9 V ~ 14 V 電流 - 電源:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（5x5） 包裝:帶卷 (TR) |
| ISL6505 WAF | 制造商:Intersil Corporation 功能描述: |
| ISL6505C WAF | 制造商:Intersil Corporation 功能描述: |
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