參數(shù)資料
型號: ISL6444
廠商: Intersil Corporation
英文描述: Dual PWM Controller with DDR Memory Option for Gateway Applications(帶DDR存儲器選項的網(wǎng)關(guān)專用雙PWM控制器)
中文描述: 雙PWM控制器的DDR網(wǎng)關(guān)應(yīng)用(帶的DDR存儲器選項的網(wǎng)關(guān)專用雙脈寬調(diào)制控制器內(nèi)存選項)
文件頁數(shù): 13/19頁
文件大?。?/td> 372K
代理商: ISL6444
13
FN9069.3
April 12, 2007
In the case when power for VDDQ is taken from the +5V
system rail, as Figure 8 shows, both in-phase and out-of-
phase approaches are susceptible to noise in the sourcing
mode.
Noise immunity can be improved by operating the VTT
converter with a 90° phase shift. As the time diagrams in
Figure 8 show, the points of concern are always about a
quarter of the period away from the noise emitting
transitions.
Several ways of synchronization are implemented into the
chip. When the DDR pin is connected to GND, the channels
operate 180° out-of-phase. In the DDR mode when the DDR
pin is connected to VCC, the channels operate either
in-phase when the VIN pin is connected to the input voltage
source, or with 90° phase shift if the VIN pin is connected to
GND via the 100k
Ω
resistor.
FIGURE 7. CHANNEL INTRFEARENCE VIN = 7.5V...24V
OUT-OF-PHASE
IN-PHASE
SOURCING
SINKING
SINKING
SOURCING
VTT
VTT
300kHz CLOCK
VDDQ
FIGURE 8. CHANNEL INTERFERENCE VIN = 5V
OUT-OF-PHASE
IN-PHASE
SOURCING
SINKING
SINKING
SOURCING
300kHz CLOCK
VTT
VTT
VDDQ
90
o
PHASE SHIFT
SINKING
SOURCING
VTT
ISL6444
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