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參數(shù)資料
| 型號(hào)： | ISL6421 |
| 廠商： | Intersil Corporation |
| 英文描述： | Single Output LNB Supply and Control Voltage Regulator with I2C Interface for Advanced Satellite Set-top Box Designs |
| 中文描述： | 單輸出LNB電源和控制穩(wěn)壓器，帶有I2C接口的先進(jìn)衛(wèi)星機(jī)頂盒設(shè)計(jì) |
| 文件頁(yè)數(shù)： | 9/10頁(yè) |
| 文件大?。?/td> | 261K |
| 代理商： | ISL6421 |
9
Received Data (
I
2
C
Bus Read Mode)
The ISL6421 can provide to the master a copy of the System
Register information via the I
2
C bus in read mode. The read
mode is Master activated by sending the chip address with
R/W bit set to 1. At the following Master generated clock bits,
the ISL6421 issues a byte on the SDA data bus line (MSB
transmitted first).
At the ninth clock bit the MCU master can:
Acknowledge the reception, starting in this way the
transmission of another byte from the ISL6421.
Not acknowledge, stopping the read mode
communication.
While the whole register is read back by the microprocessor,
only the two read-only bits, OLF and OTF, convey diagnostic
information about the ISL6421.
Power–On I
2
C Interface Reset
The I
2
C interface built into the ISL6421 is automatically reset
at power-on. The I
2
C interface block will receive a Power OK
logic signal from the UVLO circuit. This signal will go HIGH
when chip power is OK. As long as this signal is LOW, the
interface will not respond to any I
2
C commands and the
system register SR is initialized to all zeros, thus keeping the
power blocks disabled.
Once Vcc rises above the UVLO level, the POWER OK
signal given to the I
2
C interface block will be HIGH, the I
2
C
interface becomes operative and the SR can be configured
by the main microprocessor. About 400mV of hysteresis is
provided in the UVLO threshold to avoid false triggering of
the Power-On reset circuit.
(I
2
C comes up with EN = 0, EN goes HIGH at the same time
as (or later than) all other I
2
C data for the PWM becomes
valid).
ADDRESS Pin
Connecting this pin to GND forces the chip I
2
C interface
address to 0001000; applying a voltage >2.7V forces the
address to 0001001, as shown below.
I
2
C Electrical Characteristics
0
1
1
1
Dynamic current limit NOT selected
0
0
1
1
Dynamic current limit selected
0
X
1
X
X
X
0
PWM and Linear for channel 1 disabled
TABLE 5. SYSTEM REGISTER (SR1 AND SR2) CONFIGURATION (Continued)
SR
DCL
ISEL1
ENT1
LLC1
VSEL1
EN1
OLF1
FUNCTION
SR
-
-
-
-
EN2
OTF
-
FUNCTION
1
X
X
X
X
0
X
X
SR2 is selected; to read OTF flag.
TABLE 6. READING SYSTEM REGISTERS
DCL ISEL ENT LLC VSEL EN OTF OLF
FUNCTION
These bits are read as they were
after the last write operation.
0
Tj <= 130°C, Normal
operation
1
Tj > 150°C, Power
blocks disabled
0
Iout < Imax, Normal
operation
1
Iout > Imax, Overload
protection triggered
TABLE 7. ADDRESS PIN CHARACTERISTICS
VADDR
MIN
TYP
MAX
Vaddr-1
“0001000”
0V
-
2.0V
Vaddr-2
“0001001”
2.7V
-
5.0V
TABLE 8. I
2
C SPECIFICATIONS
PARAMETER
TEST
CONDITION
MIN
TYP
MAX
Input Logic High,
VIH
SDA, SCL
0.7 x V
DD
Input Logic Low,
VIL
SDA, SCL
0.3 x V
DD
Input Logic
Current, IIL
SDA, SCL;
0.4V < Vin < 4.5V
10
μ
A
SCL Clock
Frequency
0
100kHz
400kHz
ISL6421
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| ISL6421AER-T | 功能描述:IC REG SGL LNB CONTROL 32-QFN RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,000 系列:- 應(yīng)用:電源，ICERA E400，E450 輸入電壓:4.1 V ~ 5.5 V 輸出數(shù):10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA，WLCSP 供應(yīng)商設(shè)備封裝:42-WLP 包裝:帶卷 (TR) |
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| ISL6421AERZ-T | 功能描述:電流型 PWM 控制器 SINGLE LNBP SUPPLY CONTROL VG 32LD MLFP RoHS:否 制造商:Texas Instruments 開關(guān)頻率:27 KHz 上升時(shí)間: 下降時(shí)間: 工作電源電壓:6 V to 15 V 工作電源電流:1.5 mA 輸出端數(shù)量:1 最大工作溫度:+ 105 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-14 |
| ISL6421AEVAL1 | 制造商:Intersil Corporation 功能描述:SGL OUTPUT LNB SUPPLY AND CONTROL VOLT REG W/ I2C INTRFC FOR - Bulk |
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